[Sunway] 6.6: add sw64 architecture support #801
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Pull Request Overview
Adds initial support for the SW64 architecture by introducing core headers, CSR definitions, atomic primitives, checksum routines, SuperIO AST2400 support, and build infrastructure.
- Define CSR registers and read/write macros for SW64
- Provide core identification, atomic xchg/cmpxchg, and cache/barrier primitives
- Add platform-specific AST2400 SuperIO definitions and build/boot scripts
Reviewed Changes
Copilot reviewed 223 out of 223 changed files in this pull request and generated 1 comment.
Show a summary per file
| File | Description |
|---|---|
| arch/sw_64/include/asm/csr.h | CSR register defs & read/write macros |
| arch/sw_64/include/asm/cpu.h | Empty placeholder header |
| arch/sw_64/include/asm/core.h | Core ID/shifts, max cores, exception entry externs |
| arch/sw_64/include/asm/cmpxchg.h | Local and SMP atomic xchg/cmpxchg implementations |
| arch/sw_64/include/asm/checksum.h | Optimized checksum and csum helper routines |
| arch/sw_64/include/asm/cacheflush.h | Include generic cacheflush for SW64 |
| arch/sw_64/include/asm/cache.h | L1/SMP cache size definitions |
| arch/sw_64/include/asm/bug.h | Bug macros via generic interface |
| arch/sw_64/include/asm/barrier.h | Memory/barrier primitives for subarch variants |
| arch/sw_64/include/asm/ast2400.h | AST2400 SuperIO PNP and device ops |
| arch/sw_64/include/asm/asm-prototypes.h | Declarations for div/rem routines |
| arch/sw_64/include/asm/asm-offsets.h | Include generated offsets |
| arch/sw_64/include/asm/Kbuild | List of generic headers for SW64 asm include |
| arch/sw_64/boot/dts/Makefile | Device-tree build rules |
| arch/sw_64/boot/Makefile | Boot image and vmlinux targets |
| arch/sw_64/boot/.gitignore | Ignore vmlinux in boot directory |
| arch/sw_64/Makefile.postlink | Post-link relocations for vmlinux |
| arch/sw_64/Makefile | Top-level build rules & flags |
| arch/sw_64/Kconfig.debug | Debug-time SW64 Kconfig options |
| arch/sw_64/Kbuild | Kernel subdir object lists |
Comments suppressed due to low confidence (2)
arch/sw_64/include/asm/ast2400.h:35
- [nitpick] The
AST2400_GPIOBASEmacro duplicatesAST2400_WDT1_GPIO01A_Vlogic and contains a//?placeholder. Please clarify or remove the comment for readability.
#define AST2400_GPIOBASE ((0 << 8) | AST2400_WDT1_GPIO01A_V) //?
arch/sw_64/include/asm/ast2400.h:86
- [nitpick] The field name
functioninstruct pnp_infois ambiguous. Consider renaming it tofunction_idto improve clarity.
unsigned int function;\t/* Must be at least 16 bits (virtual LDNs)! */
| #endif | ||
| #undef ____xchg | ||
| #undef ____cmpxchg | ||
| #undef _ASM_SW64_XCHG_H |
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This #undef _ASM_SW64_XCHG_H appears incorrect—you're undefining an unrelated guard. It likely should target a CMPXCHG-specific macro or be removed.
Suggested change
| #undef _ASM_SW64_XCHG_H |
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The interfaces from the upstream have changed. This adapts the modifications from the upstream for SW64 IO interfaces. Signed-off-by: Mao Minkai <[email protected]>
Use a encapsulated function in MSI to resolve compilation warnings. Signed-off-by: Xu Yiwei <[email protected]>
This commit fixes two errors in pci resource assignment: -It includes RC in the resource calculation -It allows RC to participate in the resource assignment process Signed-off-by: Zheng Chongzhen <[email protected]>
Driver codes of the direct calls, via the SIMD-optimized memset and memcpy functions, may raise default when using RX580/R7 under sw64 architecture, so work around 'memset' references to 'memset_io' and 'memcpy' to 'memcpy_fromio/toio'. Signed-off-by: Zheng Chongzhen <[email protected]>
During the pci scan, the assigned IORESOURCE_IO addresses are not the expected address range. This is because asm-generic/io.h defines PCI_IOBASE, which results in the function acpi_pci_root_remap_iospace() doing remapping. To resolve this issue, the definition of PCI_IOBASE is removed. Signed-off-by: Zheng Chongzhen <[email protected]>
This patch: - Restore CSR:KTP after wake-up. - Enable longtime to make CSR:SHTCLOCK continue to count after wake-up. Signed-off-by: Zheng Chongzhen <[email protected]>
Fix base address of msiaddr register to make S3 work.
Fixes: 43d035704fa6 ("sw64: pci: use readq/writeq to read/write RC and PIU IO registers")
Signed-off-by: Zheng Chongzhen <[email protected]>
Signed-off-by: Zheng Chongzhen <[email protected]>
Add a check after getting irq number from CPU vector_irq table. Otherwise, kernel will hang after getting a null irq. Signed-off-by: Xu Yiwei <[email protected]>
Current kernel configuration has two different MSI handling codes specific to sub-architectures controlled by one single config, which is confusing and unclear. To better organize and clarify the MSI config logic, this patch introduces two IRQ_MSI configs, each dependent on the respective SUBARCH, to differentiate the two MSI handling process. Signed-off-by: Xu Yiwei <[email protected]>
Modify the location of the following function: - set_irq_regs() - irq_enter() - irq_exit() These modifications make the do_entInt() more readable. They do not affect the original program logic. Signed-off-by: Gao Chen <[email protected]>
Add a soft_csr called CSR_CAUSE into pt_regs to record the cause of trap. It can be used to unify the trap entries and identify the nmi to be added in the future. Signed-off-by: Gao Chen <[email protected]>
Support the Non-Maskable Interrupt(NMI). Any type of interrupt can be configured to be non-maskable. NMI has its separate stack, also has a separate SAVE_ALL_NMI and RESTORE_ALL_NMI. Signed-off-by: Gao Chen <[email protected]>
The issue arose because the downshift_freq() was attempting to scale down the frequency of a physicial core when only one of its logical core was offline. The correct behavior should be to scale down the frequency only when both logical cores of a pyhsicial core are offline. Signed-off-by: Tang Jinyang <[email protected]>
Hardlockup depends on non-maskable perf interrupts, so set PMI as NMI and make hw_nmi_get_sample_period() based on current frequecy. Signed-off-by: He Chuyue <[email protected]>
For kata-containers in sw64, we rename kata_guest_defconfig to kata xuelang_defconfig for C3B, and add kata_junzhang_defconfig for C4. Signed-off-by: Chen Wang <[email protected]>
Sunway PCIe hotplug driver is specifically designed for physical hardware, and should not be activated in guest and emulator. Signed-off-by: Chen Wang <[email protected]>
Due to the upstream changes, arch_remove_memory() no longer requires "int nid" as a paramenter. Signed-off-by: Gao Chen <[email protected]>
According to the upstream community, adding this configuration enables the kernel to support the probe_read and probe_read_str helper functions. Signed-off-by: Deng Xiaoyun <[email protected]>
Originally, the crash_base was restricted to above 4G. However, this would cause some devices using dma32 to fail to reset properly when the second kernle starts. To solve this problem, memblock_find_in_range() is added to automatically search for space below 4G memory. Signed-off-by: Gu Zitao <[email protected]>
In a previous commit, #include <linux/io.h> was added
inside a function, which caused compilation errors.
To resolve this issue, the header file has been moved
to the beginning of the file to ensure successful compilation.
This change does not affect functionality and is purely a fix
for the compilation error.
Fixes: ce16ff1a7368 ("sw64: sound: avoid pagefault in pcm driver's memset")
Signed-off-by: Si Ye <[email protected]>
The fallback of atomic*_{cmp,}xchg has been added to the generic
code in include/linux/atomic/atomic-arch-fallback.h. Remove macro
definitions of atomic*_{cmp,}xchg in the architecture code. More
details can be seen in commit id = d12157e.
Signed-off-by: Gu Yuchen <[email protected]>
L1I cache is not writable on SW64. Set L1I cache write event to unsupported. Signed-off-by: Mao Minkai <[email protected]>
Modify arch perf event interface so that hardware PMUs that have exclusive counters does not occupy the generic counter. All macros for hardware PMUs now use SW64_PMU_ as prefix to avoid ambiguity. Signed-off-by: Mao Minkai <[email protected]>
Treat sampling events with maximum sampling period as non-sampling events and enable all hardware PMUs for them. Signed-off-by: Mao Minkai <[email protected]>
When splitting the specific performance counters from the general performance counters, we were not adding a corresponding bitmap for the specific performance counter. And the labeling used for the specific performance counter event would conflict with the raw event. Now, we fixed it. Signed-off-by: He Chuyue <[email protected]>
We have identified multiple issues confirmed to be related to CONFIG_NO_HZ, so we are temporarily reverting to the default CONFIG_HZ_PERIODIC. Signed-off-by: Mao Minkai <[email protected]>
When a managed irq's last active cpu in its affinity mask is offline, interrupts remain disabled until another cpu in the affinity comes online. Frequent cpu hotplug operations exacerbate this issue by progressively narrowing the affinity mask, reducing the available cpu pool for recovery. To address this, we retain the original affinity during migration and introduce effective affinity through the irq_data_update_effective_affinity. This approach achieves the following benefits: 1. Maintains a larger candidate cpu pool based on the original affinity. 2. Allows interrupts to resume as soon as any cpu in the original affinity set comes online. 3. Mitigates dependency on specific cpus coming online quickly. This solution ensures more robust interrupt handing under dynamic cpu configurations while preserving system responsiveness. Signed-off-by: Zheng Chongzhen <[email protected]>
Output more information for iommu interrupts. Signed-off-by: Yan Bo <[email protected]>
Allow the interface of CPU autoplug to be accessible after initialization. Optimize the CPU autoplug strategy. Currently, we can bring multiple cores online simultaneously to meet the system performance requirements during instantaneous high loads. Signed-off-by: Zhi Tongze <[email protected]>
Fix the calculation method of the offset between the PC and the exception table entry in BPF. Signed-off-by: Gu Yuchen <[email protected]>
The issue is introduced by commit aff939d68d0a ("sw64: pci: fix
secondary bus reset issue"), which triggered an early kzalloc call
during initialization in legacy boot mode. At this stage, the slab
allocator is not yet operational, leading to allocation failures
for piu data.
To address this, the memory allocation for piu data has been
postponed to a later stage in the initialization process, ensuring
that the slab allocator is fully initialized before any memory
allocation attempts are made.
Fixes: aff939d68d0a ("sw64: pci: fix secondary bus reset issue")
Signed-off-by: Zheng Chongzhen <[email protected]>
The ftrace_call&ftrace_regs_call may modify the value of $26 saved in memory. So in entry-ftrace.S, when restoring registers, the $26 should not be restored to its original value. Signed-off-by: Gao Chen <[email protected]>
In ftrace_call(), memset&memcpy may be used. However, when memset&memcpy are traced by ftrace, the memset&memcpy in ftrace_call() will trigger ftrace_call() again, causing an infinite loop and eventually leading to a stack overflow. This patch fixes this by adding the notrace attribute to functions in arch/sw64/lib/string.c. Signed-off-by: Gao Chen <[email protected]>
When an irq is migrated, the irq may on the way to prev_cpu. If we unbind the driver immediately, we have to clear the residual vector_irq information of prev_cpu when msi_domain free irqs. So irq on the way can't get the vector_irq information that irq has been released. Signed-off-by: Lei Yilong <[email protected]>
Based on the issues that occur with testing cpuhotplug, modify msi interrupt migration strategy as follows: - If cdata have move_in_progress set, msi interrupt cannot be migrated. - If old cpu is offline, the migrating irq can then be immediately removed from the old cpu's vector_irq table. - If the remaining vector resource cannot hold all migrating irqs, then cpu is not allowed to be disabled. Signed-off-by: Zheng Chongzhen <[email protected]>
This patch: - If cdata->move_in_progress is set and dst_cpu is online, msi interrupt cannot be migrated. - If old cpu is offline, the migrating irq can then be immediately removed from the old cpu's vector_irq table. - If the remaining vector resource cannot hold all migrating irqs, then cpu is not allowed to be disabled. - Retain the original affinity during migration and introduce effective affinity (irq_data_update_effective_affinity). - Add vector_lock before modify vector_irq. Signed-off-by: Lei Yilong <[email protected]>
This patch resolves issues related to SIMD IO access on GPU: - Set contiguous VRAM addresses to iomem type to avoid memcpy. - Prevent optimization of a zeroing loop. There is a loop that assigns zero to IO space, and Gcc 12.3 will optimize this loop into a memset call. So mark the loop variable as volatile to avoid incorrect optimization. Signed-off-by: Zheng Chongzhen <[email protected]>
This path complements commit 7b9e38345558 ("sw64: msi: clear
the residual vector_irq information of cpu") by addressing the
same problem on host OS.
Signed-off-by: Zheng Chongzhen <[email protected]>
3.5G ~ 4G currently is seen as PCI 32-bit MEMIO space. In theory, this space should be excluded from memory space addressing (using resv_region APIs), which will leave a memory hole on the entire memory space naturally. However, some applications(especially qemu) under sunway do not support incontiguous memory allocation right now. This memory hole has to be seen as one of the valid IOVA ranges to pass VFIO validness check for qemu. In this case, CPU is still capable of allocating IOVA in this space, which is, frankly speaking, dangerous and buggy. We manage to find a compromise solution, which is allow these IOVA being allocated and "mapped" as usual, but with a warning issued to users at the same time. So users can quickly learn if they are using these "illegal" IOVA and thus change their strategies accordingly. Signed-off-by: Xu Yiwei <[email protected]>
Fix it according to commit 56769ba ("kbuild: unify vdso_install rules"). Signed-off-by: Gu Zitao <[email protected]>
Fix it according to commit 4356e9f ("work around gcc bugs with 'asm goto' with outputs"). Signed-off-by: Gu Zitao <[email protected]>
Fix it according to commit b2473a3 ("of/fdt: add dt_phys arg to early_init_dt_scan and early_init_dt_verify"). Signed-off-by: Gu Zitao <[email protected]>
Fix it according to commit 02410ac72ac3 ("mm: hugetlb: Add huge page
size param to huge_ptep_get_and_clear()").
Signed-off-by: Gu Zitao <[email protected]>
Avenger-285714
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Pull Request Overview
This PR adds support for the sw64 architecture, including new header files, device tree source files, and updates to various build and configuration files.
- Introduces architecture-specific headers for bug handling, barriers, and AST2400 support.
- Adds new device trees for various sw64 platforms and updates associated Makefiles and CI configurations.
Reviewed Changes
Copilot reviewed 508 out of 508 changed files in this pull request and generated 3 comments.
Show a summary per file
| File | Description |
|---|---|
| arch/sw_64/include/asm/bug.h | New header for bug handling in sw64 |
| arch/sw_64/include/asm/barrier.h | New barrier macros and inline definitions |
| arch/sw_64/include/asm/ast2400.h | Header adding AST2400 support with device and macro definitions |
| arch/sw_64/include/asm/asm-prototypes.h | New assembler prototype definitions |
| arch/sw_64/include/asm/acpi.h | New ACPI support header |
| arch/sw_64/boot/dts/*.dts | New DTS files for various sw64 platforms |
| arch/sw_64/Makefile and related Makefiles | Build system and post-link adjustments for sw64 boot |
| .gitlab-ci.yml | CI configuration for checkpatch, build, and run jobs |
| /* virtual LDN for GPIO and WDT */ | ||
| #define AST2400_WDT1 ((0 << 8) | AST2400_WDT1_GPIO01A_V) | ||
|
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| #define AST2400_GPIOBASE ((0 << 8) | AST2400_WDT1_GPIO01A_V) //? |
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[nitpick] The comment marker '//'?' is ambiguous; please clarify the intention or remove the question mark to improve clarity.
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| reg = <0x8036 0x0 0x0 0x8000>; | ||
| status = "okay"; | ||
|
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||
| porta: gpio-contraller@0 { |
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There is a spelling error 'gpio-contraller'; it should be 'gpio-controller'.
Suggested change
| porta: gpio-contraller@0 { | |
| porta: gpio-controller@0 { |
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| @@ -0,0 +1,31 @@ | |||
| before_script: | |||
| - echo "Before script section" | |||
| - echo "Clean the environmont" | |||
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The word 'environmont' appears to be a typo; please change it to 'environment'.
Suggested change
| - echo "Clean the environmont" | |
| - echo "Clean the environment" |
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Add support for sunway architecture platforms: sw3231, sw831 and sw6432.
These patches generally cover the following tasks:
1.fix support for build, ELF, rrk, ACPI, module, KVM, kexec, audit, ftrace, selftest;
2.add support for perf, acpi, clocksource, cpufreq, efi, gpio, i2c, iommu, irqchip, mfd, misc, pci, rtc, scsi, spi, tty, usb, vfio;
3.fix compile errors;
Origin PR link: https://gitcode.com/deepin-community/kernel/pull/3