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[X86] Backport new intrinsic and instruction changes in AVX10.2 #133219

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[X86] Backport new intrinsic and instruction changes in AVX10.2 #133219

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74bbc44
[X86][AVX10.2] Use 's_' for saturate-convert intrinsics (#131592)
phoebewang Mar 21, 2025
3cad497
Revert "[X86][AVX10.2] Support YMM rounding new instructions (#101825…
phoebewang Mar 21, 2025
da7083d
[X86][AVX10.2] Remove YMM rounding from VCVT2PS2PHX (#132397)
phoebewang Mar 21, 2025
f76100d
[X86][AVX10.2] Remove YMM rounding from VMINMAXP[H,S,D] (#132405)
phoebewang Mar 21, 2025
3757a76
[X86][AVX10.2] Remove YMM rounding from VCVTTP.*QS (#132414)
phoebewang Mar 21, 2025
fa4e3e4
[X86][AVX10.2] Remove YMM rounding from VCVT[,T]PS2I[,U]BS (#132426)
phoebewang Mar 22, 2025
f7a0895
Merge branch 'release/20.x' into Backport_AVX10
tstellar Mar 28, 2025
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166 changes: 20 additions & 146 deletions clang/include/clang/Basic/BuiltinsX86.td
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120 changes: 0 additions & 120 deletions clang/lib/CodeGen/CGBuiltin.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -14620,54 +14620,6 @@ static Value *EmitX86FMAExpr(CodeGenFunction &CGF, const CallExpr *E,
case clang::X86::BI__builtin_ia32_vfmaddsubpd512_mask3:
IID = llvm::Intrinsic::x86_avx512_vfmaddsub_pd_512;
break;
case clang::X86::BI__builtin_ia32_vfmsubph256_round_mask3:
Subtract = true;
LLVM_FALLTHROUGH;
case clang::X86::BI__builtin_ia32_vfmaddph256_round_mask:
case clang::X86::BI__builtin_ia32_vfmaddph256_round_maskz:
case clang::X86::BI__builtin_ia32_vfmaddph256_round_mask3:
IID = llvm::Intrinsic::x86_avx10_vfmaddph256;
break;
case clang::X86::BI__builtin_ia32_vfmsubaddph256_round_mask3:
Subtract = true;
LLVM_FALLTHROUGH;
case clang::X86::BI__builtin_ia32_vfmaddsubph256_round_mask:
case clang::X86::BI__builtin_ia32_vfmaddsubph256_round_maskz:
case clang::X86::BI__builtin_ia32_vfmaddsubph256_round_mask3:
IID = llvm::Intrinsic::x86_avx10_vfmaddsubph256;
break;
case clang::X86::BI__builtin_ia32_vfmsubps256_round_mask3:
Subtract = true;
LLVM_FALLTHROUGH;
case clang::X86::BI__builtin_ia32_vfmaddps256_round_mask:
case clang::X86::BI__builtin_ia32_vfmaddps256_round_maskz:
case clang::X86::BI__builtin_ia32_vfmaddps256_round_mask3:
IID = llvm::Intrinsic::x86_avx10_vfmaddps256;
break;
case clang::X86::BI__builtin_ia32_vfmsubpd256_round_mask3:
Subtract = true;
LLVM_FALLTHROUGH;
case clang::X86::BI__builtin_ia32_vfmaddpd256_round_mask:
case clang::X86::BI__builtin_ia32_vfmaddpd256_round_maskz:
case clang::X86::BI__builtin_ia32_vfmaddpd256_round_mask3:
IID = llvm::Intrinsic::x86_avx10_vfmaddpd256;
break;
case clang::X86::BI__builtin_ia32_vfmsubaddps256_round_mask3:
Subtract = true;
LLVM_FALLTHROUGH;
case clang::X86::BI__builtin_ia32_vfmaddsubps256_round_mask:
case clang::X86::BI__builtin_ia32_vfmaddsubps256_round_maskz:
case clang::X86::BI__builtin_ia32_vfmaddsubps256_round_mask3:
IID = llvm::Intrinsic::x86_avx10_vfmaddsubps256;
break;
case clang::X86::BI__builtin_ia32_vfmsubaddpd256_round_mask3:
Subtract = true;
LLVM_FALLTHROUGH;
case clang::X86::BI__builtin_ia32_vfmaddsubpd256_round_mask:
case clang::X86::BI__builtin_ia32_vfmaddsubpd256_round_maskz:
case clang::X86::BI__builtin_ia32_vfmaddsubpd256_round_mask3:
IID = llvm::Intrinsic::x86_avx10_vfmaddsubpd256;
break;
}

Value *A = Ops[0];
Expand Down Expand Up @@ -14707,12 +14659,6 @@ static Value *EmitX86FMAExpr(CodeGenFunction &CGF, const CallExpr *E,
case clang::X86::BI__builtin_ia32_vfmaddsubph512_mask:
case clang::X86::BI__builtin_ia32_vfmaddsubps512_mask:
case clang::X86::BI__builtin_ia32_vfmaddsubpd512_mask:
case clang::X86::BI__builtin_ia32_vfmaddph256_round_mask:
case clang::X86::BI__builtin_ia32_vfmaddps256_round_mask:
case clang::X86::BI__builtin_ia32_vfmaddpd256_round_mask:
case clang::X86::BI__builtin_ia32_vfmaddsubph256_round_mask:
case clang::X86::BI__builtin_ia32_vfmaddsubps256_round_mask:
case clang::X86::BI__builtin_ia32_vfmaddsubpd256_round_mask:
MaskFalseVal = Ops[0];
break;
case clang::X86::BI__builtin_ia32_vfmaddph512_maskz:
Expand All @@ -14721,12 +14667,6 @@ static Value *EmitX86FMAExpr(CodeGenFunction &CGF, const CallExpr *E,
case clang::X86::BI__builtin_ia32_vfmaddsubph512_maskz:
case clang::X86::BI__builtin_ia32_vfmaddsubps512_maskz:
case clang::X86::BI__builtin_ia32_vfmaddsubpd512_maskz:
case clang::X86::BI__builtin_ia32_vfmaddph256_round_maskz:
case clang::X86::BI__builtin_ia32_vfmaddps256_round_maskz:
case clang::X86::BI__builtin_ia32_vfmaddpd256_round_maskz:
case clang::X86::BI__builtin_ia32_vfmaddsubph256_round_maskz:
case clang::X86::BI__builtin_ia32_vfmaddsubps256_round_maskz:
case clang::X86::BI__builtin_ia32_vfmaddsubpd256_round_maskz:
MaskFalseVal = Constant::getNullValue(Ops[0]->getType());
break;
case clang::X86::BI__builtin_ia32_vfmsubph512_mask3:
Expand All @@ -14741,18 +14681,6 @@ static Value *EmitX86FMAExpr(CodeGenFunction &CGF, const CallExpr *E,
case clang::X86::BI__builtin_ia32_vfmaddsubps512_mask3:
case clang::X86::BI__builtin_ia32_vfmsubaddpd512_mask3:
case clang::X86::BI__builtin_ia32_vfmaddsubpd512_mask3:
case clang::X86::BI__builtin_ia32_vfmsubph256_round_mask3:
case clang::X86::BI__builtin_ia32_vfmaddph256_round_mask3:
case clang::X86::BI__builtin_ia32_vfmsubps256_round_mask3:
case clang::X86::BI__builtin_ia32_vfmaddps256_round_mask3:
case clang::X86::BI__builtin_ia32_vfmsubpd256_round_mask3:
case clang::X86::BI__builtin_ia32_vfmaddpd256_round_mask3:
case clang::X86::BI__builtin_ia32_vfmsubaddph256_round_mask3:
case clang::X86::BI__builtin_ia32_vfmaddsubph256_round_mask3:
case clang::X86::BI__builtin_ia32_vfmsubaddps256_round_mask3:
case clang::X86::BI__builtin_ia32_vfmaddsubps256_round_mask3:
case clang::X86::BI__builtin_ia32_vfmsubaddpd256_round_mask3:
case clang::X86::BI__builtin_ia32_vfmaddsubpd256_round_mask3:
MaskFalseVal = Ops[2];
break;
}
Expand Down Expand Up @@ -15451,25 +15379,13 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID,
case X86::BI__builtin_ia32_vcvtw2ph512_mask:
case X86::BI__builtin_ia32_vcvtdq2ph512_mask:
case X86::BI__builtin_ia32_vcvtqq2ph512_mask:
case X86::BI__builtin_ia32_vcvtdq2ph256_round_mask:
case X86::BI__builtin_ia32_vcvtdq2ps256_round_mask:
case X86::BI__builtin_ia32_vcvtqq2pd256_round_mask:
case X86::BI__builtin_ia32_vcvtqq2ph256_round_mask:
case X86::BI__builtin_ia32_vcvtqq2ps256_round_mask:
case X86::BI__builtin_ia32_vcvtw2ph256_round_mask:
return EmitX86ConvertIntToFp(*this, E, Ops, /*IsSigned*/ true);
case X86::BI__builtin_ia32_cvtudq2ps512_mask:
case X86::BI__builtin_ia32_cvtuqq2ps512_mask:
case X86::BI__builtin_ia32_cvtuqq2pd512_mask:
case X86::BI__builtin_ia32_vcvtuw2ph512_mask:
case X86::BI__builtin_ia32_vcvtudq2ph512_mask:
case X86::BI__builtin_ia32_vcvtuqq2ph512_mask:
case X86::BI__builtin_ia32_vcvtudq2ph256_round_mask:
case X86::BI__builtin_ia32_vcvtudq2ps256_round_mask:
case X86::BI__builtin_ia32_vcvtuqq2pd256_round_mask:
case X86::BI__builtin_ia32_vcvtuqq2ph256_round_mask:
case X86::BI__builtin_ia32_vcvtuqq2ps256_round_mask:
case X86::BI__builtin_ia32_vcvtuw2ph256_round_mask:
return EmitX86ConvertIntToFp(*this, E, Ops, /*IsSigned*/ false);

case X86::BI__builtin_ia32_vfmaddss3:
Expand Down Expand Up @@ -15516,18 +15432,6 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID,
case X86::BI__builtin_ia32_vfmaddpd512_mask3:
case X86::BI__builtin_ia32_vfmsubpd512_mask3:
case X86::BI__builtin_ia32_vfmsubph512_mask3:
case X86::BI__builtin_ia32_vfmaddph256_round_mask:
case X86::BI__builtin_ia32_vfmaddph256_round_maskz:
case X86::BI__builtin_ia32_vfmaddph256_round_mask3:
case X86::BI__builtin_ia32_vfmaddps256_round_mask:
case X86::BI__builtin_ia32_vfmaddps256_round_maskz:
case X86::BI__builtin_ia32_vfmaddps256_round_mask3:
case X86::BI__builtin_ia32_vfmsubps256_round_mask3:
case X86::BI__builtin_ia32_vfmaddpd256_round_mask:
case X86::BI__builtin_ia32_vfmaddpd256_round_maskz:
case X86::BI__builtin_ia32_vfmaddpd256_round_mask3:
case X86::BI__builtin_ia32_vfmsubpd256_round_mask3:
case X86::BI__builtin_ia32_vfmsubph256_round_mask3:
return EmitX86FMAExpr(*this, E, Ops, BuiltinID, /*IsAddSub*/ false);
case X86::BI__builtin_ia32_vfmaddsubph512_mask:
case X86::BI__builtin_ia32_vfmaddsubph512_maskz:
Expand All @@ -15541,18 +15445,6 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID,
case X86::BI__builtin_ia32_vfmaddsubpd512_maskz:
case X86::BI__builtin_ia32_vfmaddsubpd512_mask3:
case X86::BI__builtin_ia32_vfmsubaddpd512_mask3:
case X86::BI__builtin_ia32_vfmaddsubph256_round_mask:
case X86::BI__builtin_ia32_vfmaddsubph256_round_maskz:
case X86::BI__builtin_ia32_vfmaddsubph256_round_mask3:
case X86::BI__builtin_ia32_vfmsubaddph256_round_mask3:
case X86::BI__builtin_ia32_vfmaddsubps256_round_mask:
case X86::BI__builtin_ia32_vfmaddsubps256_round_maskz:
case X86::BI__builtin_ia32_vfmaddsubps256_round_mask3:
case X86::BI__builtin_ia32_vfmsubaddps256_round_mask3:
case X86::BI__builtin_ia32_vfmaddsubpd256_round_mask:
case X86::BI__builtin_ia32_vfmaddsubpd256_round_maskz:
case X86::BI__builtin_ia32_vfmaddsubpd256_round_mask3:
case X86::BI__builtin_ia32_vfmsubaddpd256_round_mask3:
return EmitX86FMAExpr(*this, E, Ops, BuiltinID, /*IsAddSub*/ true);

case X86::BI__builtin_ia32_movdqa32store128_mask:
Expand Down Expand Up @@ -17149,9 +17041,6 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID,
case X86::BI__builtin_ia32_cmppd128_mask:
case X86::BI__builtin_ia32_cmppd256_mask:
case X86::BI__builtin_ia32_cmppd512_mask:
case X86::BI__builtin_ia32_vcmppd256_round_mask:
case X86::BI__builtin_ia32_vcmpps256_round_mask:
case X86::BI__builtin_ia32_vcmpph256_round_mask:
case X86::BI__builtin_ia32_vcmpbf16512_mask:
case X86::BI__builtin_ia32_vcmpbf16256_mask:
case X86::BI__builtin_ia32_vcmpbf16128_mask:
Expand Down Expand Up @@ -17726,15 +17615,6 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID,
Value *Call = Builder.CreateCall(CGM.getIntrinsic(IID), Ops);
return EmitX86Select(*this, Ops[3], Call, Ops[0]);
}
case X86::BI__builtin_ia32_vfcmaddcph256_round_mask:
IsConjFMA = true;
LLVM_FALLTHROUGH;
case X86::BI__builtin_ia32_vfmaddcph256_round_mask: {
Intrinsic::ID IID = IsConjFMA ? Intrinsic::x86_avx10_mask_vfcmaddcph256
: Intrinsic::x86_avx10_mask_vfmaddcph256;
Value *Call = Builder.CreateCall(CGM.getIntrinsic(IID), Ops);
return EmitX86Select(*this, Ops[3], Call, Ops[0]);
}
case X86::BI__builtin_ia32_vfcmaddcsh_round_mask:
IsConjFMA = true;
[[fallthrough]];
Expand Down
46 changes: 24 additions & 22 deletions clang/lib/Headers/avx10_2_512convertintrin.h
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Original file line number Diff line number Diff line change
Expand Up @@ -78,20 +78,20 @@ _mm512_maskz_cvtbiasph_bf8(__mmask32 __U, __m512i __A, __m512h __B) {
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_cvtbiassph_bf8(__m512i __A, __m512h __B) {
_mm512_cvts_biasph_bf8(__m512i __A, __m512h __B) {
return (__m256i)__builtin_ia32_vcvtbiasph2bf8s_512_mask(
(__v64qi)__A, (__v32hf)__B, (__v32qi)_mm256_undefined_si256(),
(__mmask32)-1);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtbiassph_bf8(
static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_mask_cvts_biasph_bf8(
__m256i __W, __mmask32 __U, __m512i __A, __m512h __B) {
return (__m256i)__builtin_ia32_vcvtbiasph2bf8s_512_mask(
(__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)__W, (__mmask32)__U);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_maskz_cvtbiassph_bf8(__mmask32 __U, __m512i __A, __m512h __B) {
_mm512_maskz_cvts_biasph_bf8(__mmask32 __U, __m512i __A, __m512h __B) {
return (__m256i)__builtin_ia32_vcvtbiasph2bf8s_512_mask(
(__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)_mm256_setzero_si256(),
(__mmask32)__U);
Expand All @@ -118,20 +118,20 @@ _mm512_maskz_cvtbiasph_hf8(__mmask32 __U, __m512i __A, __m512h __B) {
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_cvtbiassph_hf8(__m512i __A, __m512h __B) {
_mm512_cvts_biasph_hf8(__m512i __A, __m512h __B) {
return (__m256i)__builtin_ia32_vcvtbiasph2hf8s_512_mask(
(__v64qi)__A, (__v32hf)__B, (__v32qi)_mm256_undefined_si256(),
(__mmask32)-1);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtbiassph_hf8(
static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_mask_cvts_biasph_hf8(
__m256i __W, __mmask32 __U, __m512i __A, __m512h __B) {
return (__m256i)__builtin_ia32_vcvtbiasph2hf8s_512_mask(
(__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)__W, (__mmask32)__U);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_maskz_cvtbiassph_hf8(__mmask32 __U, __m512i __A, __m512h __B) {
_mm512_maskz_cvts_biasph_hf8(__mmask32 __U, __m512i __A, __m512h __B) {
return (__m256i)__builtin_ia32_vcvtbiasph2hf8s_512_mask(
(__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)_mm256_setzero_si256(),
(__mmask32)__U);
Expand All @@ -157,21 +157,21 @@ _mm512_maskz_cvt2ph_bf8(__mmask64 __U, __m512h __A, __m512h __B) {
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_cvts2ph_bf8(__m512h __A, __m512h __B) {
_mm512_cvts_2ph_bf8(__m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_vcvt2ph2bf8s_512((__v32hf)(__A),
(__v32hf)(__B));
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_mask_cvts2ph_bf8(__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
_mm512_mask_cvts_2ph_bf8(__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_selectb_512(
(__mmask64)__U, (__v64qi)_mm512_cvts2ph_bf8(__A, __B), (__v64qi)__W);
(__mmask64)__U, (__v64qi)_mm512_cvts_2ph_bf8(__A, __B), (__v64qi)__W);
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_maskz_cvts2ph_bf8(__mmask64 __U, __m512h __A, __m512h __B) {
_mm512_maskz_cvts_2ph_bf8(__mmask64 __U, __m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_selectb_512(
(__mmask64)__U, (__v64qi)_mm512_cvts2ph_bf8(__A, __B),
(__mmask64)__U, (__v64qi)_mm512_cvts_2ph_bf8(__A, __B),
(__v64qi)(__m512i)_mm512_setzero_si512());
}

Expand All @@ -195,21 +195,21 @@ _mm512_maskz_cvt2ph_hf8(__mmask64 __U, __m512h __A, __m512h __B) {
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_cvts2ph_hf8(__m512h __A, __m512h __B) {
_mm512_cvts_2ph_hf8(__m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_vcvt2ph2hf8s_512((__v32hf)(__A),
(__v32hf)(__B));
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_mask_cvts2ph_hf8(__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
_mm512_mask_cvts_2ph_hf8(__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_selectb_512(
(__mmask64)__U, (__v64qi)_mm512_cvts2ph_hf8(__A, __B), (__v64qi)__W);
(__mmask64)__U, (__v64qi)_mm512_cvts_2ph_hf8(__A, __B), (__v64qi)__W);
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_maskz_cvts2ph_hf8(__mmask64 __U, __m512h __A, __m512h __B) {
_mm512_maskz_cvts_2ph_hf8(__mmask64 __U, __m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_selectb_512(
(__mmask64)__U, (__v64qi)_mm512_cvts2ph_hf8(__A, __B),
(__mmask64)__U, (__v64qi)_mm512_cvts_2ph_hf8(__A, __B),
(__v64qi)(__m512i)_mm512_setzero_si512());
}

Expand Down Expand Up @@ -247,19 +247,20 @@ _mm512_maskz_cvtph_bf8(__mmask32 __U, __m512h __A) {
(__v32hf)__A, (__v32qi)(__m256i)_mm256_setzero_si256(), (__mmask32)__U);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_cvtsph_bf8(__m512h __A) {
static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_cvts_ph_bf8(__m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2bf8s_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)_mm256_undefined_si256(), (__mmask32)-1);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_mask_cvtsph_bf8(__m256i __W, __mmask32 __U, __m512h __A) {
_mm512_mask_cvts_ph_bf8(__m256i __W, __mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2bf8s_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)__W, (__mmask32)__U);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_maskz_cvtsph_bf8(__mmask32 __U, __m512h __A) {
_mm512_maskz_cvts_ph_bf8(__mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2bf8s_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)_mm256_setzero_si256(), (__mmask32)__U);
}
Expand All @@ -281,19 +282,20 @@ _mm512_maskz_cvtph_hf8(__mmask32 __U, __m512h __A) {
(__v32hf)__A, (__v32qi)(__m256i)_mm256_setzero_si256(), (__mmask32)__U);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_cvtsph_hf8(__m512h __A) {
static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_cvts_ph_hf8(__m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2hf8s_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)_mm256_undefined_si256(), (__mmask32)-1);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_mask_cvtsph_hf8(__m256i __W, __mmask32 __U, __m512h __A) {
_mm512_mask_cvts_ph_hf8(__m256i __W, __mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2hf8s_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)__W, (__mmask32)__U);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_maskz_cvtsph_hf8(__mmask32 __U, __m512h __A) {
_mm512_maskz_cvts_ph_hf8(__mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2hf8s_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)_mm256_setzero_si256(), (__mmask32)__U);
}
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