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[MLIR][XeGPU] Add unroll patterns and blocking pass for XeGPU (1/N) #137010

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Merged
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May 12, 2025
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7d332da
init
chencha3 Apr 17, 2025
d4549ad
Merge branch 'main' into xegpu_unroll_patterns
chencha3 Apr 17, 2025
cdd5059
Merge branch 'main' into xegpu_unroll_patterns
chencha3 Apr 18, 2025
47f9b3d
add patterns for createNdOp and StoreNdOp
chencha3 Apr 18, 2025
932747e
refine nativeShapeFn
chencha3 Apr 18, 2025
f843d98
refine verifier for TensorDescType
chencha3 Apr 23, 2025
c6bdd3c
add loadNd pattern
chencha3 Apr 23, 2025
1d4dc72
add test pass
chencha3 Apr 23, 2025
545f937
format code
chencha3 Apr 23, 2025
008dbc7
add unit test
chencha3 Apr 23, 2025
d077cb0
clean up
chencha3 Apr 24, 2025
0193a04
stage
chencha3 Apr 28, 2025
7f8b00a
Merge branch 'main' into xegpu_unroll_patterns
chencha3 Apr 29, 2025
456465e
add dpas pattern and unit test
chencha3 Apr 29, 2025
906d699
refactor
chencha3 Apr 29, 2025
c63a496
fix format
chencha3 Apr 29, 2025
e2ed1ac
fix format
chencha3 Apr 29, 2025
35b35f0
refine
chencha3 Apr 30, 2025
6fef430
refine
chencha3 Apr 30, 2025
9d24920
cleanup and add patterns for rest nd ops
chencha3 Apr 30, 2025
1a92661
fix format
chencha3 Apr 30, 2025
0126eb9
cleanup
chencha3 Apr 30, 2025
a7d0614
add UnrollOption
chencha3 May 6, 2025
01ca783
fix the format
chencha3 May 6, 2025
ec74833
add comments
chencha3 May 6, 2025
68f95f0
add brief description
chencha3 May 6, 2025
9e6cf29
address comments
chencha3 May 6, 2025
15b1b46
Merge branch 'main' into xegpu_unroll_patterns
chencha3 May 6, 2025
727390f
add comments
chencha3 May 6, 2025
76f8761
fix comments
chencha3 May 6, 2025
45a3d28
renaming
chencha3 May 6, 2025
372dbd7
generalize pack, unpack, createaNdOp for supporting 1D cases
chencha3 May 6, 2025
06cf9b2
refine
chencha3 May 7, 2025
e0399ac
add 1D unit tests
chencha3 May 7, 2025
e873d59
switch to explicit types
chencha3 May 7, 2025
b55f43b
clean up
chencha3 May 7, 2025
383bd1d
move getUnrolledTypes out
chencha3 May 8, 2025
4fc35cf
addressed comments
chencha3 May 8, 2025
536a610
address comments
chencha3 May 8, 2025
39ca440
fix format
chencha3 May 8, 2025
09cec0b
Merge branch 'main' into xegpu_unroll_patterns
chencha3 May 8, 2025
1d3d12c
sync
chencha3 May 8, 2025
96cb62b
address comments
chencha3 May 8, 2025
163204a
Merge branch 'main' into xegpu_unroll_patterns
chencha3 May 9, 2025
1caac76
update cmake
chencha3 May 9, 2025
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chencha3 committed Apr 28, 2025
commit 0193a04ce106d5bfb99679ac4023b9ad5ff87c8a
2 changes: 2 additions & 0 deletions mlir/include/mlir/Dialect/XeGPU/IR/XeGPUDialect.td
Original file line number Diff line number Diff line change
Expand Up @@ -38,6 +38,8 @@ def XeGPU_Dialect : Dialect {
let useDefaultAttributePrinterParser = true;

let extraClassDeclaration = [{
static constexpr const char *operandLayoutNamePrefix = "layout_operand_";
static constexpr const char *resultLayoutNamePrefix = "layout_result_";
/// Checks if the given shape can be evenly distributed based on the layout
/// and data factors provided by the LayoutAttr.
static bool isEvenlyDistributable(llvm::ArrayRef<int64_t> shape, xegpu::LayoutAttr attr);
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15 changes: 15 additions & 0 deletions mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -378,7 +378,22 @@ struct UnrollDpasOp : public UnrollPattern<xegpu::DpasOp> {
using UnrollPattern<xegpu::DpasOp>::UnrollPattern;
LogicalResult matchAndRewrite(xegpu::DpasOp op,
PatternRewriter &rewriter) const override {

auto loc = op.getLoc();

// a vector of 3 elements should be returned, representing M, K, N respectively.
auto maybeTargetShape = getTargetShape(options, op);
if (!maybeTargetShape || maybeTargetShape->size() != 3)
return failure();
auto M = (*maybeTargetShape)[0];
auto K = (*maybeTargetShape)[1];
auto N = (*maybeTargetShape)[2];

llvm::dbgs() << "\nM: " << M << ", K: " << K << ", N: " << N << "\n";

return failure();


}
};

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