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[AMDGPU] Classify FLAT instructions as VMEM #137148

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Merged
merged 4 commits into from
May 7, 2025
Merged

[AMDGPU] Classify FLAT instructions as VMEM #137148

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15c1d84
[AMDGPU] Classify FLAT instructions as VMEM
ro-i Apr 24, 2025
5f3f7d2
implement feedback; convert to NFC; fix formatting
ro-i Apr 24, 2025
5beaf42
fallback to previous DS detection for IGLP
ro-i May 6, 2025
4a5a041
fix misunderstanding
ro-i May 6, 2025
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fallback to previous DS detection for IGLP
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@ro-i
ro-i committed May 6, 2025
commit 5beaf42d5d8a26b531e1212e9899fd61d8d1c3ef
6 changes: 3 additions & 3 deletions llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2432,15 +2432,15 @@ bool SchedGroup::canAddMI(const MachineInstr &MI) const {
Result = true;

else if (((SGMask & SchedGroupMask::DS) != SchedGroupMask::NONE) &&
(TII->isDS(MI) || TII->isLDSDMA(MI)))
TII->isDS(MI))
Result = true;

else if (((SGMask & SchedGroupMask::DS_READ) != SchedGroupMask::NONE) &&
MI.mayLoad() && (TII->isDS(MI) || TII->isLDSDMA(MI)))
MI.mayLoad() && TII->isDS(MI))
Result = true;

else if (((SGMask & SchedGroupMask::DS_WRITE) != SchedGroupMask::NONE) &&
MI.mayStore() && (TII->isDS(MI) || TII->isLDSDMA(MI)))
MI.mayStore() && TII->isDS(MI))
Result = true;

else if (((SGMask & SchedGroupMask::TRANS) != SchedGroupMask::NONE) &&
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