[NFC][TableGen] Use StringRef::str() instead of casting #139332

jurahul · 2025-05-09T21:55:15Z

Also eliminate unneeded std::string() around some literal strings.

llvmbot · 2025-05-11T19:34:02Z

@llvm/pr-subscribers-llvm-globalisel
@llvm/pr-subscribers-llvm-selectiondag

@llvm/pr-subscribers-tablegen

Author: Rahul Joshi (jurahul)

Changes

Patch is 68.92 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/139332.diff

34 Files Affected:

(modified) llvm/include/llvm/TableGen/Record.h (+1-3)
(modified) llvm/lib/TableGen/Record.cpp (+6-7)
(modified) llvm/lib/TableGen/SetTheory.cpp (+1-1)
(modified) llvm/lib/TableGen/TGParser.cpp (+1-1)
(modified) llvm/lib/TableGen/TGParser.h (+1-1)
(modified) llvm/utils/TableGen/AsmMatcherEmitter.cpp (+20-19)
(modified) llvm/utils/TableGen/AsmWriterEmitter.cpp (+23-20)
(modified) llvm/utils/TableGen/CodeEmitterGen.cpp (+3-4)
(modified) llvm/utils/TableGen/CodeGenMapTable.cpp (+5-7)
(modified) llvm/utils/TableGen/Common/AsmWriterInst.h (+1-1)
(modified) llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp (+9-13)
(modified) llvm/utils/TableGen/Common/CodeGenDAGPatterns.h (+1-2)
(modified) llvm/utils/TableGen/Common/CodeGenHwModes.cpp (+4-6)
(modified) llvm/utils/TableGen/Common/CodeGenInstAlias.cpp (+5-7)
(modified) llvm/utils/TableGen/Common/CodeGenInstruction.cpp (+14-15)
(modified) llvm/utils/TableGen/Common/CodeGenSchedule.cpp (+3-3)
(modified) llvm/utils/TableGen/Common/CodeGenSchedule.h (+1-1)
(modified) llvm/utils/TableGen/Common/CodeGenTarget.cpp (+1-1)
(modified) llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h (+2-3)
(modified) llvm/utils/TableGen/DAGISelMatcherEmitter.cpp (+1-2)
(modified) llvm/utils/TableGen/DAGISelMatcherGen.cpp (+1-1)
(modified) llvm/utils/TableGen/DFAEmitter.cpp (+3-3)
(modified) llvm/utils/TableGen/DFAPacketizerEmitter.cpp (+6-6)
(modified) llvm/utils/TableGen/DecoderEmitter.cpp (+6-7)
(modified) llvm/utils/TableGen/ExegesisEmitter.cpp (+1-1)
(modified) llvm/utils/TableGen/FastISelEmitter.cpp (+13-11)
(modified) llvm/utils/TableGen/GlobalISelEmitter.cpp (+3-3)
(modified) llvm/utils/TableGen/InstrDocsEmitter.cpp (+1-1)
(modified) llvm/utils/TableGen/OptionParserEmitter.cpp (+2-2)
(modified) llvm/utils/TableGen/RegisterInfoEmitter.cpp (+5-5)
(modified) llvm/utils/TableGen/SearchableTableEmitter.cpp (+12-12)
(modified) llvm/utils/TableGen/SubtargetEmitter.cpp (+3-3)
(modified) llvm/utils/TableGen/X86RecognizableInstr.cpp (+15-22)
(modified) llvm/utils/TableGen/X86RecognizableInstr.h (+14-18)

diff --git a/llvm/include/llvm/TableGen/Record.h b/llvm/include/llvm/TableGen/Record.h
index 982cc255553a2..c486154544dcf 100644
--- a/llvm/include/llvm/TableGen/Record.h
+++ b/llvm/include/llvm/TableGen/Record.h
@@ -745,9 +745,7 @@ class StringInit final : public TypedInit {
       return "[{" + Value.str() + "}]";
   }
 
-  std::string getAsUnquotedString() const override {
-    return std::string(Value);
-  }
+  std::string getAsUnquotedString() const override { return Value.str(); }
 
   const Init *getBit(unsigned Bit) const override {
     llvm_unreachable("Illegal bit reference off string");
diff --git a/llvm/lib/TableGen/Record.cpp b/llvm/lib/TableGen/Record.cpp
index f3d54e6083e48..71e827aaa6e9f 100644
--- a/llvm/lib/TableGen/Record.cpp
+++ b/llvm/lib/TableGen/Record.cpp
@@ -1787,22 +1787,21 @@ const Init *TernOpInit::Fold(const Record *CurRec) const {
       return Val->getDefInit();
     }
     if (LHSv && MHSv && RHSv) {
-      std::string Val = std::string(RHSv->getName());
+      std::string Val = RHSv->getName().str();
       if (LHSv->getAsString() == RHSv->getAsString())
-        Val = std::string(MHSv->getName());
+        Val = MHSv->getName().str();
       return VarInit::get(Val, getType());
     }
     if (LHSs && MHSs && RHSs) {
-      std::string Val = std::string(RHSs->getValue());
+      std::string Val = RHSs->getValue().str();
 
       std::string::size_type found;
       std::string::size_type idx = 0;
       while (true) {
-        found = Val.find(std::string(LHSs->getValue()), idx);
+        found = Val.find(LHSs->getValue().str(), idx);
         if (found == std::string::npos)
           break;
-        Val.replace(found, LHSs->getValue().size(),
-                    std::string(MHSs->getValue()));
+        Val.replace(found, LHSs->getValue().size(), MHSs->getValue().str());
         idx = found + MHSs->getValue().size();
       }
 
@@ -2417,7 +2416,7 @@ const RecTy *DefInit::getFieldType(const StringInit *FieldName) const {
   return nullptr;
 }
 
-std::string DefInit::getAsString() const { return std::string(Def->getName()); }
+std::string DefInit::getAsString() const { return Def->getName().str(); }
 
 static void ProfileVarDefInit(FoldingSetNodeID &ID, const Record *Class,
                               ArrayRef<const ArgumentInit *> Args) {
diff --git a/llvm/lib/TableGen/SetTheory.cpp b/llvm/lib/TableGen/SetTheory.cpp
index fefe03b440c85..80c2a558c3562 100644
--- a/llvm/lib/TableGen/SetTheory.cpp
+++ b/llvm/lib/TableGen/SetTheory.cpp
@@ -191,7 +191,7 @@ struct SequenceOp : public SetTheory::Operator {
 
     std::string Format;
     if (const auto *SI = dyn_cast<StringInit>(Expr->arg_begin()[0]))
-      Format = std::string(SI->getValue());
+      Format = SI->getValue().str();
     else
       PrintFatalError(Loc,  "Format must be a string: " + Expr->getAsString());
 
diff --git a/llvm/lib/TableGen/TGParser.cpp b/llvm/lib/TableGen/TGParser.cpp
index 423daf6bd5d07..7d242fb57ab3b 100644
--- a/llvm/lib/TableGen/TGParser.cpp
+++ b/llvm/lib/TableGen/TGParser.cpp
@@ -4326,7 +4326,7 @@ bool TGParser::ParseDefm(MultiClass *CurMultiClass) {
     // through its template argument names. Substs contains a substitution
     // value for each argument, either the value specified or the default.
     // Then we can resolve the template arguments.
-    MultiClass *MC = MultiClasses[std::string(Ref.Rec->getName())].get();
+    MultiClass *MC = MultiClasses[Ref.Rec->getName().str()].get();
     assert(MC && "Didn't lookup multiclass correctly?");
 
     SubstStack Substs;
diff --git a/llvm/lib/TableGen/TGParser.h b/llvm/lib/TableGen/TGParser.h
index 6094bba84fa55..017cc5fff683a 100644
--- a/llvm/lib/TableGen/TGParser.h
+++ b/llvm/lib/TableGen/TGParser.h
@@ -131,7 +131,7 @@ class TGVarScope {
   }
 
   void addVar(StringRef Name, const Init *I) {
-    bool Ins = Vars.try_emplace(std::string(Name), I).second;
+    bool Ins = Vars.try_emplace(Name.str(), I).second;
     (void)Ins;
     assert(Ins && "Local variable already exists");
   }
diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
index a3a739e6636a5..7be36773e290a 100644
--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -1114,7 +1114,7 @@ bool MatchableInfo::validate(StringRef CommentDelimiter, bool IsAlias) const {
     // Verify that any operand is only mentioned once.
     // We reject aliases and ignore instructions for now.
     if (!IsAlias && TheDef->getValueAsString("AsmMatchConverter").empty() &&
-        Tok[0] == '$' && !OperandNames.insert(std::string(Tok)).second) {
+        Tok[0] == '$' && !OperandNames.insert(Tok.str()).second) {
       LLVM_DEBUG({
         errs() << "warning: '" << TheDef->getName() << "': "
                << "ignoring instruction with tied operand '" << Tok << "'\n";
@@ -1170,7 +1170,7 @@ static std::string getEnumNameForToken(StringRef Str) {
 }
 
 ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) {
-  ClassInfo *&Entry = TokenClasses[std::string(Token)];
+  ClassInfo *&Entry = TokenClasses[Token.str()];
 
   if (!Entry) {
     Classes.emplace_front();
@@ -1178,7 +1178,7 @@ ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) {
     Entry->Kind = ClassInfo::Token;
     Entry->ClassName = "Token";
     Entry->Name = "MCK_" + getEnumNameForToken(Token);
-    Entry->ValueName = std::string(Token);
+    Entry->ValueName = Token.str();
     Entry->PredicateMethod = "<invalid>";
     Entry->RenderMethod = "<invalid>";
     Entry->ParserMethod = "";
@@ -1352,11 +1352,11 @@ void AsmMatcherInfo::buildRegisterClasses(
 
     const Init *DiagnosticType = Def->getValueInit("DiagnosticType");
     if (const StringInit *SI = dyn_cast<StringInit>(DiagnosticType))
-      CI->DiagnosticType = std::string(SI->getValue());
+      CI->DiagnosticType = SI->getValue().str();
 
     const Init *DiagnosticString = Def->getValueInit("DiagnosticString");
     if (const StringInit *SI = dyn_cast<StringInit>(DiagnosticString))
-      CI->DiagnosticString = std::string(SI->getValue());
+      CI->DiagnosticString = SI->getValue().str();
 
     // If we have a diagnostic string but the diagnostic type is not specified
     // explicitly, create an anonymous diagnostic type.
@@ -1376,11 +1376,12 @@ void AsmMatcherInfo::buildRegisterClasses(
     assert(CI && "Missing singleton register class info!");
 
     if (CI->ValueName.empty()) {
-      CI->ClassName = std::string(Rec->getName());
+      CI->ClassName = Rec->getName().str();
       CI->Name = "MCK_" + Rec->getName().str();
-      CI->ValueName = std::string(Rec->getName());
-    } else
+      CI->ValueName = Rec->getName().str();
+    } else {
       CI->ValueName = CI->ValueName + "," + Rec->getName().str();
+    }
   }
 }
 
@@ -1413,14 +1414,14 @@ void AsmMatcherInfo::buildOperandClasses() {
       else
         CI->SuperClasses.push_back(SC);
     }
-    CI->ClassName = std::string(Rec->getValueAsString("Name"));
+    CI->ClassName = Rec->getValueAsString("Name").str();
     CI->Name = "MCK_" + CI->ClassName;
-    CI->ValueName = std::string(Rec->getName());
+    CI->ValueName = Rec->getName().str();
 
     // Get or construct the predicate method name.
     const Init *PMName = Rec->getValueInit("PredicateMethod");
     if (const StringInit *SI = dyn_cast<StringInit>(PMName)) {
-      CI->PredicateMethod = std::string(SI->getValue());
+      CI->PredicateMethod = SI->getValue().str();
     } else {
       assert(isa<UnsetInit>(PMName) && "Unexpected PredicateMethod field!");
       CI->PredicateMethod = "is" + CI->ClassName;
@@ -1429,7 +1430,7 @@ void AsmMatcherInfo::buildOperandClasses() {
     // Get or construct the render method name.
     const Init *RMName = Rec->getValueInit("RenderMethod");
     if (const StringInit *SI = dyn_cast<StringInit>(RMName)) {
-      CI->RenderMethod = std::string(SI->getValue());
+      CI->RenderMethod = SI->getValue().str();
     } else {
       assert(isa<UnsetInit>(RMName) && "Unexpected RenderMethod field!");
       CI->RenderMethod = "add" + CI->ClassName + "Operands";
@@ -1438,15 +1439,15 @@ void AsmMatcherInfo::buildOperandClasses() {
     // Get the parse method name or leave it as empty.
     const Init *PRMName = Rec->getValueInit("ParserMethod");
     if (const StringInit *SI = dyn_cast<StringInit>(PRMName))
-      CI->ParserMethod = std::string(SI->getValue());
+      CI->ParserMethod = SI->getValue().str();
 
     // Get the diagnostic type and string or leave them as empty.
     const Init *DiagnosticType = Rec->getValueInit("DiagnosticType");
     if (const StringInit *SI = dyn_cast<StringInit>(DiagnosticType))
-      CI->DiagnosticType = std::string(SI->getValue());
+      CI->DiagnosticType = SI->getValue().str();
     const Init *DiagnosticString = Rec->getValueInit("DiagnosticString");
     if (const StringInit *SI = dyn_cast<StringInit>(DiagnosticString))
-      CI->DiagnosticString = std::string(SI->getValue());
+      CI->DiagnosticString = SI->getValue().str();
     // If we have a DiagnosticString, we need a DiagnosticType for use within
     // the matcher.
     if (!CI->DiagnosticString.empty() && CI->DiagnosticType.empty())
@@ -1459,7 +1460,7 @@ void AsmMatcherInfo::buildOperandClasses() {
     // Get or construct the default method name.
     const Init *DMName = Rec->getValueInit("DefaultMethod");
     if (const StringInit *SI = dyn_cast<StringInit>(DMName)) {
-      CI->DefaultMethod = std::string(SI->getValue());
+      CI->DefaultMethod = SI->getValue().str();
     } else {
       assert(isa<UnsetInit>(DMName) && "Unexpected DefaultMethod field!");
       CI->DefaultMethod = "default" + CI->ClassName + "Operands";
@@ -1905,7 +1906,7 @@ void MatchableInfo::buildAliasResultOperands(bool AliasConstraintsAreChecked) {
     }
 
     // Handle all the suboperands for this operand.
-    const std::string &OpName = OpInfo.Name;
+    StringRef OpName = OpInfo.Name;
     for (; AliasOpNo < LastOpNo &&
            CGA.ResultInstOperandIndex[AliasOpNo].first == Idx;
          ++AliasOpNo) {
@@ -3051,8 +3052,8 @@ emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target,
 static void emitAsmTiedOperandConstraints(CodeGenTarget &Target,
                                           AsmMatcherInfo &Info, raw_ostream &OS,
                                           bool HasOptionalOperands) {
-  std::string AsmParserName =
-      std::string(Info.AsmParser->getValueAsString("AsmParserClassName"));
+  StringRef AsmParserName =
+      Info.AsmParser->getValueAsString("AsmParserClassName");
   OS << "static bool ";
   OS << "checkAsmTiedOperandConstraints(const " << Target.getName()
      << AsmParserName << "&AsmParser,\n";
diff --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp b/llvm/utils/TableGen/AsmWriterEmitter.cpp
index d0ec4fc8e23a6..1a326f456373a 100644
--- a/llvm/utils/TableGen/AsmWriterEmitter.cpp
+++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp
@@ -192,7 +192,7 @@ void AsmWriterEmitter::FindUniqueOperandCommands(
       InstIdxs[idx].push_back(i);
     } else {
       UniqueOperandCommands.push_back(std::move(Command));
-      InstrsForCase.push_back(std::string(Inst.CGI->TheDef->getName()));
+      InstrsForCase.push_back(Inst.CGI->TheDef->getName().str());
       InstIdxs.emplace_back();
       InstIdxs.back().push_back(i);
 
@@ -592,9 +592,9 @@ emitRegisterNameString(raw_ostream &O, StringRef AltName,
     // "NoRegAltName" is special. We don't need to do a lookup for that,
     // as it's just a reference to the default register name.
     if (AltName == "" || AltName == "NoRegAltName") {
-      AsmName = std::string(Reg.TheDef->getValueAsString("AsmName"));
+      AsmName = Reg.TheDef->getValueAsString("AsmName").str();
       if (AsmName.empty())
-        AsmName = std::string(Reg.getName());
+        AsmName = Reg.getName().str();
     } else {
       // Make sure the register has an alternate name for this index.
       std::vector<const Record *> AltNameList =
@@ -612,7 +612,7 @@ emitRegisterNameString(raw_ostream &O, StringRef AltName,
           PrintFatalError(Reg.TheDef->getLoc(),
                           "Register definition missing alt name for '" +
                               AltName + "'.");
-        AsmName = std::string(AltNames[Idx]);
+        AsmName = AltNames[Idx].str();
       }
     }
     StringTable.add(AsmName);
@@ -939,7 +939,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
                                              }) -
                                PrintMethods.begin();
               if (static_cast<unsigned>(PrintMethodIdx) == PrintMethods.size())
-                PrintMethods.emplace_back(std::string(PrintMethod), IsPCRel);
+                PrintMethods.emplace_back(PrintMethod.str(), IsPCRel);
             }
           }
 
@@ -951,12 +951,14 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
               const Record *R = CGA.ResultOperands[i].getRecord();
               if (R->isSubClassOf("RegisterOperand"))
                 R = R->getValueAsDef("RegClass");
-              IAP.addCond(std::string(
+              IAP.addCond(
                   formatv("AliasPatternCond::K_RegClass, {}::{}RegClassID",
-                          Namespace, R->getName())));
+                          Namespace, R->getName())
+                      .str());
             } else {
-              IAP.addCond(std::string(formatv("AliasPatternCond::K_TiedReg, {}",
-                                              IAP.getOpIndex(ROName))));
+              IAP.addCond(formatv("AliasPatternCond::K_TiedReg, {}",
+                                  IAP.getOpIndex(ROName))
+                              .str());
             }
           } else {
             // Assume all printable operands are desired for now. This can be
@@ -972,8 +974,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
               } else
                 break; // No conditions on this operand at all
             }
-            IAP.addCond(
-                std::string(formatv("AliasPatternCond::K_Custom, {}", Entry)));
+            IAP.addCond(formatv("AliasPatternCond::K_Custom, {}", Entry).str());
           }
           break;
         }
@@ -985,20 +986,21 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
           if (Imm != Imm32)
             PrintFatalError("Matching an alias with an immediate out of the "
                             "range of int32_t is not supported");
-          IAP.addCond(std::string(
-              formatv("AliasPatternCond::K_Imm, uint32_t({})", Imm32)));
+          IAP.addCond(
+              formatv("AliasPatternCond::K_Imm, uint32_t({})", Imm32).str());
           break;
         }
         case CodeGenInstAlias::ResultOperand::K_Reg:
           if (!CGA.ResultOperands[i].getRegister()) {
-            IAP.addCond(std::string(
-                formatv("AliasPatternCond::K_Reg, {}::NoRegister", Namespace)));
+            IAP.addCond(
+                formatv("AliasPatternCond::K_Reg, {}::NoRegister", Namespace)
+                    .str());
             break;
           }
 
           StringRef Reg = CGA.ResultOperands[i].getRegister()->getName();
-          IAP.addCond(std::string(
-              formatv("AliasPatternCond::K_Reg, {}::{}", Namespace, Reg)));
+          IAP.addCond(
+              formatv("AliasPatternCond::K_Reg, {}::{}", Namespace, Reg).str());
           break;
         }
 
@@ -1051,9 +1053,10 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
               !cast<DefInit>(Arg)->getDef()->isSubClassOf("SubtargetFeature"))
             PrintFatalError(R->getLoc(), "Invalid AssemblerCondDag!");
 
-          IAP.addCond(std::string(formatv(
-              "AliasPatternCond::K_{}{}Feature, {}::{}", IsOr ? "Or" : "",
-              IsNeg ? "Neg" : "", Namespace, Arg->getAsString())));
+          IAP.addCond(formatv("AliasPatternCond::K_{}{}Feature, {}::{}",
+                              IsOr ? "Or" : "", IsNeg ? "Neg" : "", Namespace,
+                              Arg->getAsString())
+                          .str());
         }
         // If an AssemblerPredicate with ors is used, note end of list should
         // these be combined.
diff --git a/llvm/utils/TableGen/CodeEmitterGen.cpp b/llvm/utils/TableGen/CodeEmitterGen.cpp
index 475699ae3e78e..1ed1244736a98 100644
--- a/llvm/utils/TableGen/CodeEmitterGen.cpp
+++ b/llvm/utils/TableGen/CodeEmitterGen.cpp
@@ -142,7 +142,7 @@ bool CodeEmitterGen::addCodeToMergeInOperand(const Record *R,
   }
 
   std::pair<unsigned, unsigned> SO = CGI.Operands.getSubOperandNumber(OpIdx);
-  std::string &EncoderMethodName =
+  const std::string &EncoderMethodName =
       CGI.Operands[SO.first].EncoderMethodNames[SO.second];
 
   if (UseAPInt)
@@ -309,8 +309,7 @@ CodeEmitterGen::getInstructionCases(const Record *R,
               "      case " + itostr(DefaultMode) + ": InstBitsByHw = InstBits";
         } else {
           Case += "      case " + itostr(ModeId) +
-                  ": InstBitsByHw = InstBits_" +
-                  std::string(HWM.getMode(ModeId).Name);
+                  ": InstBitsByHw = InstBits_" + HWM.getMode(ModeId).Name.str();
         }
         Case += "; break;\n";
       }
@@ -362,7 +361,7 @@ void CodeEmitterGen::addInstructionCasesForEncoding(
     if (RV.isNonconcreteOK() || RV.getValue()->isComplete())
       continue;
 
-    Success &= addCodeToMergeInOperand(R, BI, std::string(RV.getName()), Case,
+    Success &= addCodeToMergeInOperand(R, BI, RV.getName().str(), Case,
                                        BitOffsetCase, Target);
   }
   // Avoid empty switches.
diff --git a/llvm/utils/TableGen/CodeGenMapTable.cpp b/llvm/utils/TableGen/CodeGenMapTable.cpp
index 2641e713c0c85..380821d086e60 100644
--- a/llvm/utils/TableGen/CodeGenMapTable.cpp
+++ b/llvm/utils/TableGen/CodeGenMapTable.cpp
@@ -102,9 +102,7 @@ class InstrMap {
   std::vector<const ListInit *> ValueCols;
 
 public:
-  InstrMap(const Record *MapRec) {
-    Name = std::string(MapRec->getName());
-
+  InstrMap(const Record *MapRec) : Name(MapRec->getName().str()) {
     // FilterClass - It's used to reduce the search space only to the
     // instructions that define the kind of relationship modeled by
     // this InstrMapping object/record.
@@ -133,8 +131,8 @@ class InstrMap {
 
     // Each instruction map must specify at least one column for it to be valid.
     if (ColValList->empty())
-      PrintFatalError(MapRec->getLoc(), "InstrMapping record `" +
-                                            MapRec->getName() + "' has empty " +
+      PrintFatalError(MapRec->getLoc(), "InstrMapping record `" + Name +
+                                            "' has empty " +
                                             "`ValueCols' field!");
 
     for (const Init *I : ColValList->getValues()) {
@@ -144,7 +142,7 @@ class InstrMap {
       // elements as the fields in 'ColFields'.
       if (ColI->size() != ColFields->size())
         PrintFatalError(MapRec->getLoc(),
-                        "Record `" + MapRec->getName() +
+                        "Record `" + Name +
                             "', field `ValueCols' entries don't match with " +
                             " the entries in 'ColFields'!");
       ValueCols.push_back(ColI);
@@ -188,7 +186,7 @@ class MapTableEmitter {
   MapTableEmitter(const CodeGenTarget &Target, const RecordKeeper &Records,
                   const Record *IMRec)
       : Target(Target), InstrMapDesc(IMRec) {
-    const std::string &FilterClass = InstrMapDesc.getFilterClass();
+    StringRef FilterClass = InstrMapDesc.getFilterClass();
     InstrDefs = Records.getAllDerivedDefinitions(FilterClass);
   }
 
diff --git a/llvm/utils/TableGen/Common/AsmWriterInst.h b/llvm/utils/TableGen/Common/AsmWriterInst.h
index 7c21eb6abad95..26745a8459570 100644
--- a/llvm/utils/TableGen/Common/AsmWriterInst.h
+++ b/llvm/utils/TableGen/Common/AsmWriterInst.h
@@ -38,7 +38,7 @@ struct AsmWriterOperand {
   unsigned MIOpNo = 0;
 
   /// Str - For isLiteralTextOperand, this IS the literal text.  For
-  /// isMachineInstrOperand, this is the PrinterMethodName for the operand..
+  /// isMachineInstrOperand, this is the PrinterMethodName for the operand.
   /// For isLiteralStatementOperand, this is the code to insert verbatim
   /// into the asm writer.
   std::string Str;
diff --git a/llvm/utils/Table...
[truncated]

llvmbot · 2025-05-11T19:34:02Z

@llvm/pr-subscribers-backend-x86

Author: Rahul Joshi (jurahul)

Changes

Patch is 68.92 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/139332.diff

34 Files Affected:

(modified) llvm/include/llvm/TableGen/Record.h (+1-3)
(modified) llvm/lib/TableGen/Record.cpp (+6-7)
(modified) llvm/lib/TableGen/SetTheory.cpp (+1-1)
(modified) llvm/lib/TableGen/TGParser.cpp (+1-1)
(modified) llvm/lib/TableGen/TGParser.h (+1-1)
(modified) llvm/utils/TableGen/AsmMatcherEmitter.cpp (+20-19)
(modified) llvm/utils/TableGen/AsmWriterEmitter.cpp (+23-20)
(modified) llvm/utils/TableGen/CodeEmitterGen.cpp (+3-4)
(modified) llvm/utils/TableGen/CodeGenMapTable.cpp (+5-7)
(modified) llvm/utils/TableGen/Common/AsmWriterInst.h (+1-1)
(modified) llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp (+9-13)
(modified) llvm/utils/TableGen/Common/CodeGenDAGPatterns.h (+1-2)
(modified) llvm/utils/TableGen/Common/CodeGenHwModes.cpp (+4-6)
(modified) llvm/utils/TableGen/Common/CodeGenInstAlias.cpp (+5-7)
(modified) llvm/utils/TableGen/Common/CodeGenInstruction.cpp (+14-15)
(modified) llvm/utils/TableGen/Common/CodeGenSchedule.cpp (+3-3)
(modified) llvm/utils/TableGen/Common/CodeGenSchedule.h (+1-1)
(modified) llvm/utils/TableGen/Common/CodeGenTarget.cpp (+1-1)
(modified) llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h (+2-3)
(modified) llvm/utils/TableGen/DAGISelMatcherEmitter.cpp (+1-2)
(modified) llvm/utils/TableGen/DAGISelMatcherGen.cpp (+1-1)
(modified) llvm/utils/TableGen/DFAEmitter.cpp (+3-3)
(modified) llvm/utils/TableGen/DFAPacketizerEmitter.cpp (+6-6)
(modified) llvm/utils/TableGen/DecoderEmitter.cpp (+6-7)
(modified) llvm/utils/TableGen/ExegesisEmitter.cpp (+1-1)
(modified) llvm/utils/TableGen/FastISelEmitter.cpp (+13-11)
(modified) llvm/utils/TableGen/GlobalISelEmitter.cpp (+3-3)
(modified) llvm/utils/TableGen/InstrDocsEmitter.cpp (+1-1)
(modified) llvm/utils/TableGen/OptionParserEmitter.cpp (+2-2)
(modified) llvm/utils/TableGen/RegisterInfoEmitter.cpp (+5-5)
(modified) llvm/utils/TableGen/SearchableTableEmitter.cpp (+12-12)
(modified) llvm/utils/TableGen/SubtargetEmitter.cpp (+3-3)
(modified) llvm/utils/TableGen/X86RecognizableInstr.cpp (+15-22)
(modified) llvm/utils/TableGen/X86RecognizableInstr.h (+14-18)

diff --git a/llvm/include/llvm/TableGen/Record.h b/llvm/include/llvm/TableGen/Record.h
index 982cc255553a2..c486154544dcf 100644
--- a/llvm/include/llvm/TableGen/Record.h
+++ b/llvm/include/llvm/TableGen/Record.h
@@ -745,9 +745,7 @@ class StringInit final : public TypedInit {
       return "[{" + Value.str() + "}]";
   }
 
-  std::string getAsUnquotedString() const override {
-    return std::string(Value);
-  }
+  std::string getAsUnquotedString() const override { return Value.str(); }
 
   const Init *getBit(unsigned Bit) const override {
     llvm_unreachable("Illegal bit reference off string");
diff --git a/llvm/lib/TableGen/Record.cpp b/llvm/lib/TableGen/Record.cpp
index f3d54e6083e48..71e827aaa6e9f 100644
--- a/llvm/lib/TableGen/Record.cpp
+++ b/llvm/lib/TableGen/Record.cpp
@@ -1787,22 +1787,21 @@ const Init *TernOpInit::Fold(const Record *CurRec) const {
       return Val->getDefInit();
     }
     if (LHSv && MHSv && RHSv) {
-      std::string Val = std::string(RHSv->getName());
+      std::string Val = RHSv->getName().str();
       if (LHSv->getAsString() == RHSv->getAsString())
-        Val = std::string(MHSv->getName());
+        Val = MHSv->getName().str();
       return VarInit::get(Val, getType());
     }
     if (LHSs && MHSs && RHSs) {
-      std::string Val = std::string(RHSs->getValue());
+      std::string Val = RHSs->getValue().str();
 
       std::string::size_type found;
       std::string::size_type idx = 0;
       while (true) {
-        found = Val.find(std::string(LHSs->getValue()), idx);
+        found = Val.find(LHSs->getValue().str(), idx);
         if (found == std::string::npos)
           break;
-        Val.replace(found, LHSs->getValue().size(),
-                    std::string(MHSs->getValue()));
+        Val.replace(found, LHSs->getValue().size(), MHSs->getValue().str());
         idx = found + MHSs->getValue().size();
       }
 
@@ -2417,7 +2416,7 @@ const RecTy *DefInit::getFieldType(const StringInit *FieldName) const {
   return nullptr;
 }
 
-std::string DefInit::getAsString() const { return std::string(Def->getName()); }
+std::string DefInit::getAsString() const { return Def->getName().str(); }
 
 static void ProfileVarDefInit(FoldingSetNodeID &ID, const Record *Class,
                               ArrayRef<const ArgumentInit *> Args) {
diff --git a/llvm/lib/TableGen/SetTheory.cpp b/llvm/lib/TableGen/SetTheory.cpp
index fefe03b440c85..80c2a558c3562 100644
--- a/llvm/lib/TableGen/SetTheory.cpp
+++ b/llvm/lib/TableGen/SetTheory.cpp
@@ -191,7 +191,7 @@ struct SequenceOp : public SetTheory::Operator {
 
     std::string Format;
     if (const auto *SI = dyn_cast<StringInit>(Expr->arg_begin()[0]))
-      Format = std::string(SI->getValue());
+      Format = SI->getValue().str();
     else
       PrintFatalError(Loc,  "Format must be a string: " + Expr->getAsString());
 
diff --git a/llvm/lib/TableGen/TGParser.cpp b/llvm/lib/TableGen/TGParser.cpp
index 423daf6bd5d07..7d242fb57ab3b 100644
--- a/llvm/lib/TableGen/TGParser.cpp
+++ b/llvm/lib/TableGen/TGParser.cpp
@@ -4326,7 +4326,7 @@ bool TGParser::ParseDefm(MultiClass *CurMultiClass) {
     // through its template argument names. Substs contains a substitution
     // value for each argument, either the value specified or the default.
     // Then we can resolve the template arguments.
-    MultiClass *MC = MultiClasses[std::string(Ref.Rec->getName())].get();
+    MultiClass *MC = MultiClasses[Ref.Rec->getName().str()].get();
     assert(MC && "Didn't lookup multiclass correctly?");
 
     SubstStack Substs;
diff --git a/llvm/lib/TableGen/TGParser.h b/llvm/lib/TableGen/TGParser.h
index 6094bba84fa55..017cc5fff683a 100644
--- a/llvm/lib/TableGen/TGParser.h
+++ b/llvm/lib/TableGen/TGParser.h
@@ -131,7 +131,7 @@ class TGVarScope {
   }
 
   void addVar(StringRef Name, const Init *I) {
-    bool Ins = Vars.try_emplace(std::string(Name), I).second;
+    bool Ins = Vars.try_emplace(Name.str(), I).second;
     (void)Ins;
     assert(Ins && "Local variable already exists");
   }
diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
index a3a739e6636a5..7be36773e290a 100644
--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -1114,7 +1114,7 @@ bool MatchableInfo::validate(StringRef CommentDelimiter, bool IsAlias) const {
     // Verify that any operand is only mentioned once.
     // We reject aliases and ignore instructions for now.
     if (!IsAlias && TheDef->getValueAsString("AsmMatchConverter").empty() &&
-        Tok[0] == '$' && !OperandNames.insert(std::string(Tok)).second) {
+        Tok[0] == '$' && !OperandNames.insert(Tok.str()).second) {
       LLVM_DEBUG({
         errs() << "warning: '" << TheDef->getName() << "': "
                << "ignoring instruction with tied operand '" << Tok << "'\n";
@@ -1170,7 +1170,7 @@ static std::string getEnumNameForToken(StringRef Str) {
 }
 
 ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) {
-  ClassInfo *&Entry = TokenClasses[std::string(Token)];
+  ClassInfo *&Entry = TokenClasses[Token.str()];
 
   if (!Entry) {
     Classes.emplace_front();
@@ -1178,7 +1178,7 @@ ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) {
     Entry->Kind = ClassInfo::Token;
     Entry->ClassName = "Token";
     Entry->Name = "MCK_" + getEnumNameForToken(Token);
-    Entry->ValueName = std::string(Token);
+    Entry->ValueName = Token.str();
     Entry->PredicateMethod = "<invalid>";
     Entry->RenderMethod = "<invalid>";
     Entry->ParserMethod = "";
@@ -1352,11 +1352,11 @@ void AsmMatcherInfo::buildRegisterClasses(
 
     const Init *DiagnosticType = Def->getValueInit("DiagnosticType");
     if (const StringInit *SI = dyn_cast<StringInit>(DiagnosticType))
-      CI->DiagnosticType = std::string(SI->getValue());
+      CI->DiagnosticType = SI->getValue().str();
 
     const Init *DiagnosticString = Def->getValueInit("DiagnosticString");
     if (const StringInit *SI = dyn_cast<StringInit>(DiagnosticString))
-      CI->DiagnosticString = std::string(SI->getValue());
+      CI->DiagnosticString = SI->getValue().str();
 
     // If we have a diagnostic string but the diagnostic type is not specified
     // explicitly, create an anonymous diagnostic type.
@@ -1376,11 +1376,12 @@ void AsmMatcherInfo::buildRegisterClasses(
     assert(CI && "Missing singleton register class info!");
 
     if (CI->ValueName.empty()) {
-      CI->ClassName = std::string(Rec->getName());
+      CI->ClassName = Rec->getName().str();
       CI->Name = "MCK_" + Rec->getName().str();
-      CI->ValueName = std::string(Rec->getName());
-    } else
+      CI->ValueName = Rec->getName().str();
+    } else {
       CI->ValueName = CI->ValueName + "," + Rec->getName().str();
+    }
   }
 }
 
@@ -1413,14 +1414,14 @@ void AsmMatcherInfo::buildOperandClasses() {
       else
         CI->SuperClasses.push_back(SC);
     }
-    CI->ClassName = std::string(Rec->getValueAsString("Name"));
+    CI->ClassName = Rec->getValueAsString("Name").str();
     CI->Name = "MCK_" + CI->ClassName;
-    CI->ValueName = std::string(Rec->getName());
+    CI->ValueName = Rec->getName().str();
 
     // Get or construct the predicate method name.
     const Init *PMName = Rec->getValueInit("PredicateMethod");
     if (const StringInit *SI = dyn_cast<StringInit>(PMName)) {
-      CI->PredicateMethod = std::string(SI->getValue());
+      CI->PredicateMethod = SI->getValue().str();
     } else {
       assert(isa<UnsetInit>(PMName) && "Unexpected PredicateMethod field!");
       CI->PredicateMethod = "is" + CI->ClassName;
@@ -1429,7 +1430,7 @@ void AsmMatcherInfo::buildOperandClasses() {
     // Get or construct the render method name.
     const Init *RMName = Rec->getValueInit("RenderMethod");
     if (const StringInit *SI = dyn_cast<StringInit>(RMName)) {
-      CI->RenderMethod = std::string(SI->getValue());
+      CI->RenderMethod = SI->getValue().str();
     } else {
       assert(isa<UnsetInit>(RMName) && "Unexpected RenderMethod field!");
       CI->RenderMethod = "add" + CI->ClassName + "Operands";
@@ -1438,15 +1439,15 @@ void AsmMatcherInfo::buildOperandClasses() {
     // Get the parse method name or leave it as empty.
     const Init *PRMName = Rec->getValueInit("ParserMethod");
     if (const StringInit *SI = dyn_cast<StringInit>(PRMName))
-      CI->ParserMethod = std::string(SI->getValue());
+      CI->ParserMethod = SI->getValue().str();
 
     // Get the diagnostic type and string or leave them as empty.
     const Init *DiagnosticType = Rec->getValueInit("DiagnosticType");
     if (const StringInit *SI = dyn_cast<StringInit>(DiagnosticType))
-      CI->DiagnosticType = std::string(SI->getValue());
+      CI->DiagnosticType = SI->getValue().str();
     const Init *DiagnosticString = Rec->getValueInit("DiagnosticString");
     if (const StringInit *SI = dyn_cast<StringInit>(DiagnosticString))
-      CI->DiagnosticString = std::string(SI->getValue());
+      CI->DiagnosticString = SI->getValue().str();
     // If we have a DiagnosticString, we need a DiagnosticType for use within
     // the matcher.
     if (!CI->DiagnosticString.empty() && CI->DiagnosticType.empty())
@@ -1459,7 +1460,7 @@ void AsmMatcherInfo::buildOperandClasses() {
     // Get or construct the default method name.
     const Init *DMName = Rec->getValueInit("DefaultMethod");
     if (const StringInit *SI = dyn_cast<StringInit>(DMName)) {
-      CI->DefaultMethod = std::string(SI->getValue());
+      CI->DefaultMethod = SI->getValue().str();
     } else {
       assert(isa<UnsetInit>(DMName) && "Unexpected DefaultMethod field!");
       CI->DefaultMethod = "default" + CI->ClassName + "Operands";
@@ -1905,7 +1906,7 @@ void MatchableInfo::buildAliasResultOperands(bool AliasConstraintsAreChecked) {
     }
 
     // Handle all the suboperands for this operand.
-    const std::string &OpName = OpInfo.Name;
+    StringRef OpName = OpInfo.Name;
     for (; AliasOpNo < LastOpNo &&
            CGA.ResultInstOperandIndex[AliasOpNo].first == Idx;
          ++AliasOpNo) {
@@ -3051,8 +3052,8 @@ emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target,
 static void emitAsmTiedOperandConstraints(CodeGenTarget &Target,
                                           AsmMatcherInfo &Info, raw_ostream &OS,
                                           bool HasOptionalOperands) {
-  std::string AsmParserName =
-      std::string(Info.AsmParser->getValueAsString("AsmParserClassName"));
+  StringRef AsmParserName =
+      Info.AsmParser->getValueAsString("AsmParserClassName");
   OS << "static bool ";
   OS << "checkAsmTiedOperandConstraints(const " << Target.getName()
      << AsmParserName << "&AsmParser,\n";
diff --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp b/llvm/utils/TableGen/AsmWriterEmitter.cpp
index d0ec4fc8e23a6..1a326f456373a 100644
--- a/llvm/utils/TableGen/AsmWriterEmitter.cpp
+++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp
@@ -192,7 +192,7 @@ void AsmWriterEmitter::FindUniqueOperandCommands(
       InstIdxs[idx].push_back(i);
     } else {
       UniqueOperandCommands.push_back(std::move(Command));
-      InstrsForCase.push_back(std::string(Inst.CGI->TheDef->getName()));
+      InstrsForCase.push_back(Inst.CGI->TheDef->getName().str());
       InstIdxs.emplace_back();
       InstIdxs.back().push_back(i);
 
@@ -592,9 +592,9 @@ emitRegisterNameString(raw_ostream &O, StringRef AltName,
     // "NoRegAltName" is special. We don't need to do a lookup for that,
     // as it's just a reference to the default register name.
     if (AltName == "" || AltName == "NoRegAltName") {
-      AsmName = std::string(Reg.TheDef->getValueAsString("AsmName"));
+      AsmName = Reg.TheDef->getValueAsString("AsmName").str();
       if (AsmName.empty())
-        AsmName = std::string(Reg.getName());
+        AsmName = Reg.getName().str();
     } else {
       // Make sure the register has an alternate name for this index.
       std::vector<const Record *> AltNameList =
@@ -612,7 +612,7 @@ emitRegisterNameString(raw_ostream &O, StringRef AltName,
           PrintFatalError(Reg.TheDef->getLoc(),
                           "Register definition missing alt name for '" +
                               AltName + "'.");
-        AsmName = std::string(AltNames[Idx]);
+        AsmName = AltNames[Idx].str();
       }
     }
     StringTable.add(AsmName);
@@ -939,7 +939,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
                                              }) -
                                PrintMethods.begin();
               if (static_cast<unsigned>(PrintMethodIdx) == PrintMethods.size())
-                PrintMethods.emplace_back(std::string(PrintMethod), IsPCRel);
+                PrintMethods.emplace_back(PrintMethod.str(), IsPCRel);
             }
           }
 
@@ -951,12 +951,14 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
               const Record *R = CGA.ResultOperands[i].getRecord();
               if (R->isSubClassOf("RegisterOperand"))
                 R = R->getValueAsDef("RegClass");
-              IAP.addCond(std::string(
+              IAP.addCond(
                   formatv("AliasPatternCond::K_RegClass, {}::{}RegClassID",
-                          Namespace, R->getName())));
+                          Namespace, R->getName())
+                      .str());
             } else {
-              IAP.addCond(std::string(formatv("AliasPatternCond::K_TiedReg, {}",
-                                              IAP.getOpIndex(ROName))));
+              IAP.addCond(formatv("AliasPatternCond::K_TiedReg, {}",
+                                  IAP.getOpIndex(ROName))
+                              .str());
             }
           } else {
             // Assume all printable operands are desired for now. This can be
@@ -972,8 +974,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
               } else
                 break; // No conditions on this operand at all
             }
-            IAP.addCond(
-                std::string(formatv("AliasPatternCond::K_Custom, {}", Entry)));
+            IAP.addCond(formatv("AliasPatternCond::K_Custom, {}", Entry).str());
           }
           break;
         }
@@ -985,20 +986,21 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
           if (Imm != Imm32)
             PrintFatalError("Matching an alias with an immediate out of the "
                             "range of int32_t is not supported");
-          IAP.addCond(std::string(
-              formatv("AliasPatternCond::K_Imm, uint32_t({})", Imm32)));
+          IAP.addCond(
+              formatv("AliasPatternCond::K_Imm, uint32_t({})", Imm32).str());
           break;
         }
         case CodeGenInstAlias::ResultOperand::K_Reg:
           if (!CGA.ResultOperands[i].getRegister()) {
-            IAP.addCond(std::string(
-                formatv("AliasPatternCond::K_Reg, {}::NoRegister", Namespace)));
+            IAP.addCond(
+                formatv("AliasPatternCond::K_Reg, {}::NoRegister", Namespace)
+                    .str());
             break;
           }
 
           StringRef Reg = CGA.ResultOperands[i].getRegister()->getName();
-          IAP.addCond(std::string(
-              formatv("AliasPatternCond::K_Reg, {}::{}", Namespace, Reg)));
+          IAP.addCond(
+              formatv("AliasPatternCond::K_Reg, {}::{}", Namespace, Reg).str());
           break;
         }
 
@@ -1051,9 +1053,10 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
               !cast<DefInit>(Arg)->getDef()->isSubClassOf("SubtargetFeature"))
             PrintFatalError(R->getLoc(), "Invalid AssemblerCondDag!");
 
-          IAP.addCond(std::string(formatv(
-              "AliasPatternCond::K_{}{}Feature, {}::{}", IsOr ? "Or" : "",
-              IsNeg ? "Neg" : "", Namespace, Arg->getAsString())));
+          IAP.addCond(formatv("AliasPatternCond::K_{}{}Feature, {}::{}",
+                              IsOr ? "Or" : "", IsNeg ? "Neg" : "", Namespace,
+                              Arg->getAsString())
+                          .str());
         }
         // If an AssemblerPredicate with ors is used, note end of list should
         // these be combined.
diff --git a/llvm/utils/TableGen/CodeEmitterGen.cpp b/llvm/utils/TableGen/CodeEmitterGen.cpp
index 475699ae3e78e..1ed1244736a98 100644
--- a/llvm/utils/TableGen/CodeEmitterGen.cpp
+++ b/llvm/utils/TableGen/CodeEmitterGen.cpp
@@ -142,7 +142,7 @@ bool CodeEmitterGen::addCodeToMergeInOperand(const Record *R,
   }
 
   std::pair<unsigned, unsigned> SO = CGI.Operands.getSubOperandNumber(OpIdx);
-  std::string &EncoderMethodName =
+  const std::string &EncoderMethodName =
       CGI.Operands[SO.first].EncoderMethodNames[SO.second];
 
   if (UseAPInt)
@@ -309,8 +309,7 @@ CodeEmitterGen::getInstructionCases(const Record *R,
               "      case " + itostr(DefaultMode) + ": InstBitsByHw = InstBits";
         } else {
           Case += "      case " + itostr(ModeId) +
-                  ": InstBitsByHw = InstBits_" +
-                  std::string(HWM.getMode(ModeId).Name);
+                  ": InstBitsByHw = InstBits_" + HWM.getMode(ModeId).Name.str();
         }
         Case += "; break;\n";
       }
@@ -362,7 +361,7 @@ void CodeEmitterGen::addInstructionCasesForEncoding(
     if (RV.isNonconcreteOK() || RV.getValue()->isComplete())
       continue;
 
-    Success &= addCodeToMergeInOperand(R, BI, std::string(RV.getName()), Case,
+    Success &= addCodeToMergeInOperand(R, BI, RV.getName().str(), Case,
                                        BitOffsetCase, Target);
   }
   // Avoid empty switches.
diff --git a/llvm/utils/TableGen/CodeGenMapTable.cpp b/llvm/utils/TableGen/CodeGenMapTable.cpp
index 2641e713c0c85..380821d086e60 100644
--- a/llvm/utils/TableGen/CodeGenMapTable.cpp
+++ b/llvm/utils/TableGen/CodeGenMapTable.cpp
@@ -102,9 +102,7 @@ class InstrMap {
   std::vector<const ListInit *> ValueCols;
 
 public:
-  InstrMap(const Record *MapRec) {
-    Name = std::string(MapRec->getName());
-
+  InstrMap(const Record *MapRec) : Name(MapRec->getName().str()) {
     // FilterClass - It's used to reduce the search space only to the
     // instructions that define the kind of relationship modeled by
     // this InstrMapping object/record.
@@ -133,8 +131,8 @@ class InstrMap {
 
     // Each instruction map must specify at least one column for it to be valid.
     if (ColValList->empty())
-      PrintFatalError(MapRec->getLoc(), "InstrMapping record `" +
-                                            MapRec->getName() + "' has empty " +
+      PrintFatalError(MapRec->getLoc(), "InstrMapping record `" + Name +
+                                            "' has empty " +
                                             "`ValueCols' field!");
 
     for (const Init *I : ColValList->getValues()) {
@@ -144,7 +142,7 @@ class InstrMap {
       // elements as the fields in 'ColFields'.
       if (ColI->size() != ColFields->size())
         PrintFatalError(MapRec->getLoc(),
-                        "Record `" + MapRec->getName() +
+                        "Record `" + Name +
                             "', field `ValueCols' entries don't match with " +
                             " the entries in 'ColFields'!");
       ValueCols.push_back(ColI);
@@ -188,7 +186,7 @@ class MapTableEmitter {
   MapTableEmitter(const CodeGenTarget &Target, const RecordKeeper &Records,
                   const Record *IMRec)
       : Target(Target), InstrMapDesc(IMRec) {
-    const std::string &FilterClass = InstrMapDesc.getFilterClass();
+    StringRef FilterClass = InstrMapDesc.getFilterClass();
     InstrDefs = Records.getAllDerivedDefinitions(FilterClass);
   }
 
diff --git a/llvm/utils/TableGen/Common/AsmWriterInst.h b/llvm/utils/TableGen/Common/AsmWriterInst.h
index 7c21eb6abad95..26745a8459570 100644
--- a/llvm/utils/TableGen/Common/AsmWriterInst.h
+++ b/llvm/utils/TableGen/Common/AsmWriterInst.h
@@ -38,7 +38,7 @@ struct AsmWriterOperand {
   unsigned MIOpNo = 0;
 
   /// Str - For isLiteralTextOperand, this IS the literal text.  For
-  /// isMachineInstrOperand, this is the PrinterMethodName for the operand..
+  /// isMachineInstrOperand, this is the PrinterMethodName for the operand.
   /// For isLiteralStatementOperand, this is the code to insert verbatim
   /// into the asm writer.
   std::string Str;
diff --git a/llvm/utils/Table...
[truncated]

kazutakahirata

Could you try to do fewer types of cleanups in one PR? IIUC, some functions are being removed. There are some migrations from std::string to StringRef. Thanks!

jurahul · 2025-05-11T21:55:28Z

Fair enough. I did revert a few locally before but agreed. W

jurahul · 2025-05-12T00:20:07Z

I have reverted the other changes now. PTAL again, thanks!

kazutakahirata

LGTM. Thanks!

jurahul force-pushed the tablegen_string_cast_to_str branch from b34b68b to fffe84e Compare May 10, 2025 13:18

jurahul marked this pull request as ready for review May 11, 2025 19:33

llvmbot added backend:X86 tablegen llvm:globalisel llvm:SelectionDAG SelectionDAGISel as well labels May 11, 2025

jurahul requested a review from kazutakahirata May 11, 2025 19:33

kazutakahirata reviewed May 11, 2025

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jurahul force-pushed the tablegen_string_cast_to_str branch from fffe84e to 8363222 Compare May 11, 2025 22:32

jurahul requested a review from kazutakahirata May 12, 2025 00:20

kazutakahirata approved these changes May 12, 2025

View reviewed changes

jurahul force-pushed the tablegen_string_cast_to_str branch from 8363222 to 2fa1210 Compare May 12, 2025 16:02

[NFC][TableGen] Use StringRef::str() instead of casting

5d6ee29

jurahul force-pushed the tablegen_string_cast_to_str branch from 2fa1210 to 5d6ee29 Compare May 12, 2025 17:02

jurahul merged commit 9981afc into llvm:main May 12, 2025
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jurahul deleted the tablegen_string_cast_to_str branch May 12, 2025 22:41

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[NFC][TableGen] Use StringRef::str() instead of casting #139332

[NFC][TableGen] Use StringRef::str() instead of casting #139332

jurahul commented May 9, 2025 •

edited

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[NFC][TableGen] Use StringRef::str() instead of casting #139332

[NFC][TableGen] Use StringRef::str() instead of casting #139332

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jurahul commented May 9, 2025 •

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