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This project provides a analog / mixed signal IC schematic capture and layout tool with the accompanying netlisters, simulators, and verification tools.
Analog Insydes is a Mathematica toolbox for symbolic analysis of analog electronic circuits. This project provides a set of free add-ons to Analog Insydes, including a Java front-end and a native netlister for Cadence's Analog Design Environment (ADE).
vMAGIC is a Java-API which helps creating VHDL generators and analyzers. vMAGIC comprises three parts: 1st a VHDL'93 compliant parser, 2nd a programming model to easily create and modify VHDL constructs, and 3rd a VHDL Writer to generate code.
OpenVGA is an free and open FPGA-based implementation of a VGA compatible graphics adapter, and utilising low-cost hardware. The project includes the PCB schematic and artwork, Verilog HDL, firmware assembly code, and driver sourcecode.
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"cif2tribes" is a console-based tool for converting integrated circuit layouts into maps usable in the game Tribes 2, as a 3D visualization aid. The projectcode is modular enough to be easily extended to different game engines and input file formats.
RegMapDef is a project to provide an XML schema and associated tools to support a standardized way of describing register maps.
The tools shall incorporate XSL style sheets and scripts to generate documentation, header files, implementation stubs etc.
NecJGui is an antennas design tool, interface for Numerical Electromagnetic Code. It allows easily making NEC input files, and viewing them in 3D. It also contains a version of the simulator, so it's complete IDE for full-wave EM simulation.