site:arxiv.org ("Ghidra" OR "IDA Pro" OR "Radare2" OR "Capstone engine" OR "Unicorn emulator" OR "IoT firmware" OR "embedded systems" OR "GNU Debugger" OR "binary analysis" OR "firmware analysis" OR "Hardware Hacking" OR "Valgrind" OR "Rizin" OR "MT Manager" OR "Yara" OR "UPX" OR "x64dbg" OR "shellcode" OR "cryptography" OR "steganography" OR "FFMPEG" OR "HTTP/3" OR "SMTP" OR "obfuscation")

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site:eprint.iacr.org ( intext:"side channel" OR intext:"fault injection" OR intext:"timing attack" OR intext:"power analysis" OR intext:"cache attack" OR intext:"differential fault" OR intext:"rowhammer" OR intext:"cold boot attack" OR intext:"chosen plaintext" OR intext:"chosen ciphertext" OR intext:"meet-in-the-middle" OR intext:"man in the middle" OR intext:"key extraction" OR intext:"key recovery" OR intext:"fault attack" OR intext:"EM analysis" OR intext:"power glitch" OR intext:"voltage glitch" OR intext:"memory corruption" OR intext:"code injection" OR intext:"privilege escalation" OR intext:"constant time" OR intext:"masking scheme" OR intext:"differential power" OR intext:"simple power" OR intext:"template attack" OR intext:"SCA" OR intext:"fault resistance" OR intext:"hardware trojan" OR intext:"reverse engineering" OR intext:"cryptanalysis" OR intext:"chosen key" OR intext:"fault tolerant" OR intext:"secure boot" OR intext:"DRAM attack" OR intext:"glitch attack" OR intext:"DPA" OR intext:"SPA" OR intext:"cache timing" OR intext:"flush+reload" OR intext:"prime+probe" OR intext:"branch prediction" OR intext:"Meltdown" OR intext:"Spectre" OR intext:"Foreshadow" OR intext:"microarchitectural attack" OR intext:"secure enclave" OR intext:"SGX attack" OR intext:"tamper resistance" )