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Add Ethernet+Marvell switch tag link-layer header types. #13

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14 changes: 14 additions & 0 deletions linktypes.html
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Original file line number Diff line number Diff line change
Expand Up @@ -834,6 +834,20 @@ <h2 class="title">
<a
href="https://github.com/jkcko/ieee802.15.4-tap/blob/master/IEEE%20802.15.4%20TAP%20Link%20Type%20Specification.pdf">pseudo-header
containing TLVs with metadata</a> preceding the 802.15.4 header.
</tr>
<tr valign=top>
<td>LINKTYPE_DSA_TAG_DSA<td>284<td>DLT_DSA_TAG_DSA<td>
Ethernet frames, with a
<a href="linktypes/marvell-switch-tag.html">switch tag</a> inserted
between the source address field and the type/length field in the
Ethernet header.
</tr>
<tr valign=top>
<td>LINKTYPE_DSA_TAG_EDSA<td>285<td>DLT_DSA_TAG_EDSA<td>
Ethernet frames, with a programmable Ethernet type
<a href="linktypes/marvell-switch-tag.html">switch tag</a> inserted
between the source address field and the type/length field in the
Ethernet header.
</tr>
</table>
</div>
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223 changes: 223 additions & 0 deletions linktypes/marvell-switch-tag.html
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<!-- Start of Marvell switch tag section -->
<div class="post">
<h2 class="title">
<a name="intro">Marvell switch tag</a>
</h2>
<div class="entry">
<h3>Switch tag structure</h3>
The Marvell (Ethertyped or not) DSA tagged frames contains a
proprietary tag inserted between the source address field and the
type/length field in the Ethernet header.

The DSA tag is 4 octets. It contains the source (or target) switch
device and port or trunk numbers. It is placed in the frame on top
of the standard IEEE tag.

The EDSA tag is 8 octets. It contains a programmable Ethernet type,
two reserved bytes (always 0), and a standard DSA tag.

<pre>
7 6 5 4 3 2 1 0
. . . . . . . . .
0 +---+---+---+---+---+---+---+---+
| Ether Destination Address |
+6 +---+---+---+---+---+---+---+---+
| Ether Source Address |
+6 +---+---+---+---+---+---+---+---+ --
| Prog. DSA Ether Type [15:8] | |
+1 +---+---+---+---+---+---+---+---+ |
| Prog. DSA Ether Type [7:0] | | EDSA tag
+1 +---+---+---+---+---+---+---+---+ |
| Reserved (0x00 0x00) | |
+2 +---+---+---+---+---+---+---+---+ | --
| Mode |b29| Switch Device | | |
+1 +---+---+---+---+---+---+---+---+ | |
| Switch Port |b18|b17|b16| | |
+1 +---+---+---+---+---+---+---+---+ | | DSA tag
| PRI [2:0] |b12| VID [11:8] | | |
+1 +---+---+---+---+---+---+---+---+ | |
| VID [7:0] | | |
+1 +---+---+---+---+---+---+---+---+ -- --
| Ether Length/Type |
+2 +---+---+---+---+---+---+---+---+
. . . . . . . . .
</pre>

<h4>To_CPU frame mode (ingress)</h4>
The DSA tag mode 0x0 describes a To_CPU frame.

If the b29 bit is set, the original frame contained an IEEE tag
converted into a DSA tag, otherwise the frame was originally untagged
and the DSA tag was added to the frame.

The switch device and port bits define the numbers of the original
source device and port where the frame first ingressed.

Bits b17, b16 and b12 are the frame type code bits 2, 1 and 0,
describing the kind of To_CPU frame:
<ul>
<li>0x0 for BPDU (MGMT) Trap</li>
<li>0x1 for Frame2Reg Response</li>
<li>0x2 for IGMP/MLD Trap</li>
<li>0x3 Policy Trap</li>
<li>0x4 for ARP Mirror</li>
<li>0x3 Policy Mirror</li>
</ul>

The b16 bit is the original frame's CFI bit if it was IEEE tagged.

The PRI bits define the priority assigned to the frame when it entered
the source device.

The VID bits define the VLAN identifier assigned to the frame when
it entered the source device.

<h4>From_CPU frame mode (egress)</h4>
The DSA tag mode 0x1 describes a From_CPU frame.

If the b29 bit is set, the frame egresses the target port with an
IEEE tag, otherwise the frame egresses the target port untagged.

The switch device and port bits define the numbers of the target
device and port where the frame must egress.

The b16 bit is used as the frame's IEEE tag CFI bit if the frame
egresses the target port tagged.

The PRI bits define the IEEE tag priority of the frame if it egresses
the target port tagged, otherwise they indicate the egress queue the
frame is to be switched to.

The VID bits define the IEEE VID of the frame if it egresses the
target port tagged, otherwise they are ignored.

<h4>To_Sniffer frame mode (ingress)</h4>
The DSA tag mode 0x2 describes a To_Sniffer frame.

If the b29 bit is set, the original frame contained an IEEE tag
converted into a DSA tag, otherwise the frame was originally untagged
and the DSA tag was added to the frame.

The switch device and port bits define the numbers of the original
source device and port where the frame first ingressed.

If the b18 bit is set, the frame came from an ingress source port,
otherwise it came from an egress source port.

The b16 bit is the original frame's CFI bit if it was IEEE tagged.

The PRI bits define the priority assigned to the frame when it entered
the source device.

The VID bits define the VLAN identifier assigned to the frame when
it entered the source device.

<h4>Forward DSA tag frame mode (egress)</h4>
The DSA tag mode 0x3 describes a Forward frame.

The b29 bit is used to inform the egress port to consider the frame
as tagged if set, otherwise as untagged.

The PRI bits are used as the IEEE tag priority of the frame.

The VID bits are used as the IEEE VID of the frame.

<h4>Forward DSA tag frame mode (ingress)</h4>
The DSA tag mode 0x3 describes a Forward frame.

If the b29 bit is set, the original frame contained an IEEE tag
converted into a DSA tag, otherwise the frame was originally untagged
and the DSA tag was added to the frame.

The switch device and port bits define the numbers of the original
source device and port where the frame first ingressed.

If the b18 bit is set, the switch port bits indicate a trunk ID,
otherwise a port number.

The b16 bit is the original frame's CFI bit if it was IEEE tagged.

The PRI bits define the priority assigned to the frame when it entered
the source device.

The VID bits define the VLAN identifier assigned to the frame when
it entered the source device.
</div>
<!-- End of Marvell switch tag section -->
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