Skip to content

MLECO-4409: Arm Corstone-315 support #146

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
3 changes: 3 additions & 0 deletions .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -116,3 +116,6 @@ out/
tmp/
*.cbuild.yml
*.cbuild-idx.yml
*.cbuild-pack.yml
*.cbuild-set.yml

37 changes: 25 additions & 12 deletions cmsis-pack-examples/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -42,17 +42,19 @@ Currently, the following examples are supported:

Target platforms supported:

| Name | Type | IP | Examples |
|-----------------------|---------------------|-----------------------------------------------|----------|
| Arm® Corstone™-300 | Virtual or physical | Arm® Cortex®-M55 CPU | All |
| Arm® Corstone™-300-U55 | Virtual or physical | Arm® Cortex®-M55 CPU with Arm® Ethos™-U55 | All |
| Arm® Corstone™-300-U65 | Virtual or physical | Arm® Cortex®-M55 CPU with Arm® Ethos™-U65 | All |
| Arm® Corstone™-310 | Virtual or physical | Arm® Cortex®-M85 CPU | All |
| Arm® Corstone™-310 | Virtual or physical | Arm® Cortex®-M85 CPU with Arm® Ethos™-U55 | All |
| Arm® Corstone™-310-U65 | Virtual or physical | Arm® Cortex®-M85 CPU with Arm® Ethos™-U65 NPU | All |
| Name | Type | IP | Examples |
|------------------------------|---------------------|-----------------------------------------------|----------|
| Arm® Corstone™-300 | Virtual or physical | Arm® Cortex®-M55 CPU | All |
| Arm® Corstone™-300-U55 | Virtual or physical | Arm® Cortex®-M55 CPU with Arm® Ethos™-U55 | All |
| Arm® Corstone™-300-U65 | Virtual or physical | Arm® Cortex®-M55 CPU with Arm® Ethos™-U65 | All |
| Arm® Corstone™-310 | Virtual or physical | Arm® Cortex®-M85 CPU | All |
| Arm® Corstone™-310 | Virtual or physical | Arm® Cortex®-M85 CPU with Arm® Ethos™-U55 | All |
| Arm® Corstone™-310-U65 | Virtual or physical | Arm® Cortex®-M85 CPU with Arm® Ethos™-U65 NPU | All |
| Arm® Corstone™-315 | Virtual or physical | Arm® Cortex®-M85 CPU | All |
| Arm® Corstone™-315-U65 | Virtual or physical | Arm® Cortex®-M85 CPU with Arm® Ethos™-U65 NPU | All |
| Alif™ Ensemble™ E7 AI/ML Kit | Physical board | Arm® Cortex®-M55 CPU with Arm® Ethos™-U55 NPU | All |
| STM32® F746G-Discovery| Physical board | Arm® Cortex®-M7 CPU | KWS |
| NXP® FRDM-K64F | Physical board | Arm® Cortex®-M4 CPU | KWS |
| STM32® F746G-Discovery | Physical board | Arm® Cortex®-M7 CPU | KWS |
| NXP® FRDM-K64F | Physical board | Arm® Cortex®-M4 CPU | KWS |


Use this import button to open the solution in Keil Studio Cloud: [![Open in Keil Studio](https://img.shields.io/badge/Keil%20Studio-Import-blue?logo=data:image/svg+xml;base64,PD94bWwgdmVyc2lvbj0iMS4wIiBlbmNvZGluZz0idXRmLTgiPz4NCjwhLS0gR2VuZXJhdG9yOiBBZG9iZSBJbGx1c3RyYXRvciAyNS40LjEsIFNWRyBFeHBvcnQgUGx1Zy1JbiAuIFNWRyBWZXJzaW9uOiA2LjAwIEJ1aWxkIDApICAtLT4NCjxzdmcgdmVyc2lvbj0iMS4xIiBpZD0iTGF5ZXJfMSIgeG1sbnM9Imh0dHA6Ly93d3cudzMub3JnLzIwMDAvc3ZnIiB4bWxuczp4bGluaz0iaHR0cDovL3d3dy53My5vcmcvMTk5OS94bGluayIgeD0iMHB4IiB5PSIwcHgiDQoJIHZpZXdCb3g9IjAgMCA0NyAxNCIgc3R5bGU9ImVuYWJsZS1iYWNrZ3JvdW5kOm5ldyAwIDAgNDcgMTQ7IiB4bWw6c3BhY2U9InByZXNlcnZlIj4NCjxzdHlsZSB0eXBlPSJ0ZXh0L2NzcyI+DQoJLnN0MHtmaWxsOiNGRkZGRkY7fQ0KPC9zdHlsZT4NCjxwYXRoIGNsYXNzPSJzdDAiIGQ9Ik00LjcsN2MwLDIuMiwxLjQsNC4xLDMuNSw0LjFjMS44LDAsMy42LTEuNCwzLjYtNC4xYzAtMi44LTEuNy00LjItMy42LTQuMkM2LjIsMi45LDQuNyw0LjcsNC43LDcgTTExLjYsMC41DQoJaDIuOXYxM2gtMi45di0xLjNjLTAuOSwxLjEtMi4zLDEuNy0zLjcsMS43QzQsMTMuOSwxLjgsMTAuNiwxLjgsN2MwLTQuMywyLjctNi45LDYuMS02LjljMS41LDAsMi44LDAuNywzLjcsMS45VjAuNXoiLz4NCjxwYXRoIGNsYXNzPSJzdDAiIGQ9Ik0xOCwwLjVIMjF2MS4yYzAuMy0wLjQsMC43LTAuOCwxLjItMS4xYzAuNS0wLjMsMS4yLTAuNCwxLjctMC40YzAuOCwwLDEuNiwwLjIsMi4zLDAuNmwtMS4yLDIuOA0KCWMtMC40LTAuMy0xLTAuNC0xLjUtMC40Yy0wLjctMC4xLTEuMywwLjItMS44LDAuN0MyMSw0LjYsMjEsNS45LDIxLDYuOHY2LjdIMThWMC41eiIvPg0KPHBhdGggY2xhc3M9InN0MCIgZD0iTTI4LjIsMC41aDIuOXYxLjJjMC43LTAuOSwxLjktMS42LDMuMS0xLjZjMS4zLDAsMi42LDAuNywzLjIsMS45YzAuOS0xLjIsMi4yLTEuOSwzLjctMS45DQoJQzQyLjcsMCw0NCwwLjksNDQuNywyLjJjMC4yLDAuNCwwLjcsMS40LDAuNywzLjN2OC4xaC0yLjlWNi4zYzAtMS41LTAuMi0yLjEtMC4yLTIuM2MtMC4yLTAuNy0wLjktMS4yLTEuNy0xLjENCgljLTAuNywwLTEuMywwLjMtMS43LDAuOWMtMC41LDAuOC0wLjYsMS45LTAuNiwyLjl2Ni43aC0yLjlWNi4zYzAtMS41LTAuMi0yLjEtMC4yLTIuM2MtMC4yLTAuNy0wLjktMS4yLTEuNy0xLjENCgljLTAuNywwLTEuMywwLjMtMS43LDAuOWMtMC41LDAuOC0wLjYsMS45LTAuNiwyLjl2Ni43aC0yLjlMMjguMiwwLjV6Ii8+DQo8L3N2Zz4NCg==&logoWidth=47)](https://studio.keil.arm.com/?import=https://github.com/Arm-Examples/mlek-cmsis-pack-examples.git)
Expand Down Expand Up @@ -130,7 +132,7 @@ In addition to the above, the VSI Python scripts depend on `opencv-python` packa
a virtual environment and installing this with pip.

```shell
$ pip install opencv-python
$ pip install opencv-python "numpy<2.0.0"
```

**NOTE**: The requirement for Python version is driven by the FVP executable. Versions <= 11.26 require
Expand Down Expand Up @@ -249,19 +251,30 @@ $ cp ./out/kws/STM32F746-DISCO/Release/kws.Release+STM32F746-DISCO.bin /media/us

### Working with Virtual Streaming Interface

The object detection example for Arm Corstone-300 and Corstone-310 supports Virtual Streaming Interface (VSI).
The object detection example supports the Virtual Streaming Interface (VSI) feature found in the FVPs for Arm Corstone-300, Corstone-310 and Corstone-315.
This allows the locally installed FVP application (or an AVH instance) to read images in from a camera connected to
your local machine and stream these over to the application running within the FVP.

To run the VSI application, append the command line with the v_path argument. For example:

#### Arm Corstone-300 + Arm Corstone-310

```shell
$ <path_to_installed_FVP> \
-a ./out/object-detection-vsi/AVH-SSE-300-U55/Release/object-detection-vsi.axf \
-C ethosu.num_macs=256 \
-C mps3_board.v_path=./device/corstone/vsi/video/python/
```

#### Arm Corstone-315

```shell
$ <path_to_installed_FVP> \
-a ./out/object-detection-vsi/AVH-SSE-315-U65/Release/object-detection-vsi.axf \
-C ethosu.num_macs=256 \
-C mps4_board.v_path=./device/corstone/vsi/video/python/
```

## Application output

Once the project can be built successfully, the execution on target hardware will show output of
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -25,10 +25,12 @@ layer:
for-context:
- +AVH-SSE-300
- +AVH-SSE-310
- +AVH-SSE-315
- +AVH-SSE-300-U55
- +AVH-SSE-310-U55
- +AVH-SSE-300-U65
- +AVH-SSE-310-U65
- +AVH-SSE-315-U65
files:
- file: src/retarget.c
- file: src/uart_cmsdk_apb.c
Expand All @@ -51,13 +53,16 @@ layer:
for-context:
- +AVH-SSE-300-U65
- +AVH-SSE-310-U65
- +AVH-SSE-315-U65
- component: tensorflow::Machine Learning:TensorFlow:Kernel&Ethos-U
for-context:
- +AVH-SSE-300-U55
- +AVH-SSE-310-U55
- +AVH-SSE-300-U65
- +AVH-SSE-310-U65
- +AVH-SSE-315-U65
- component: tensorflow::Machine Learning:TensorFlow:Kernel&CMSIS-NN
for-context:
- +AVH-SSE-300
- +AVH-SSE-310
- +AVH-SSE-310
- +AVH-SSE-315
12 changes: 6 additions & 6 deletions cmsis-pack-examples/device/corstone/src/BoardInit.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -66,10 +66,10 @@ static void arm_ethosu_npu_irq_handler(void)
/** @brief Initialises the NPU IRQ */
static void arm_ethosu_npu_irq_init(void)
{
#if defined(CORSTONE310_FVP)
const IRQn_Type ethosu_irqnum = (IRQn_Type)NPU0_IRQn;
#else
#if defined(CORSTONE300_FVP)
const IRQn_Type ethosu_irqnum = (IRQn_Type)ETHOS_U55_IRQn;
#else
const IRQn_Type ethosu_irqnum = (IRQn_Type)NPU0_IRQn;
#endif

/* Register the EthosU IRQ handler in our vector table.
Expand All @@ -91,10 +91,10 @@ static int arm_ethosu_npu_init(void)
arm_ethosu_npu_irq_init();

/* Initialise Ethos-U device */
#if defined(CORSTONE310_FVP)
void* const ethosu_base_address = (void*)(NPU0_APB_BASE_NS);
#else
#if defined(CORSTONE300_FVP)
void* const ethosu_base_address = (void*)(ETHOS_U55_APB_BASE_S);
#else
void* const ethosu_base_address = (void*)(NPU0_APB_BASE_NS);
#endif

debug("Cache arena: 0x%p\n", get_cache_arena());
Expand Down
9 changes: 7 additions & 2 deletions cmsis-pack-examples/device/corstone/src/uart_cmsdk_apb.c
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright 2022 Arm Limited and/or its
* SPDX-FileCopyrightText: Copyright 2022, 2024 Arm Limited and/or its
* affiliates <[email protected]>
* SPDX-License-Identifier: Apache-2.0
*
Expand All @@ -20,6 +20,11 @@

#include "uart_config.h"
#include "uart_stdout.h"

/* Platform dependent files */
#include "RTE_Components.h" /* Provides definition for CMSIS_device_header */
#include CMSIS_device_header /* Gives us IRQ num, base addresses. */

#include <stdint.h>
#include <stdio.h>

Expand All @@ -46,7 +51,7 @@ typedef struct {
__IO uint32_t BAUDDIV; /* Offset: 0x010 (R/W) Baudrate Divider Register */
} CMSDK_UART_TypeDef;

#define CMSDK_UART0_BASE UART0_BASE
#define CMSDK_UART0_BASE UART0_BASE_NS
#define CMSDK_UART0 ((CMSDK_UART_TypeDef*)CMSDK_UART0_BASE)
#define CMSDK_UART0_BAUDRATE UART0_BAUDRATE

Expand Down
3 changes: 1 addition & 2 deletions cmsis-pack-examples/device/corstone/src/uart_config.h
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright 2022 Arm Limited and/or its
* SPDX-FileCopyrightText: Copyright 2022, 2024 Arm Limited and/or its
* affiliates <[email protected]>
* SPDX-License-Identifier: Apache-2.0
*
Expand All @@ -19,7 +19,6 @@
#ifndef _UART_CONFIG_H_
#define _UART_CONFIG_H_

#define UART0_BASE (0x49303000)
#define UART0_BAUDRATE (115200)
#define SYSTEM_CORE_CLOCK (25000000)

Expand Down
10 changes: 10 additions & 0 deletions cmsis-pack-examples/kws/kws.cproject.yml
Original file line number Diff line number Diff line change
Expand Up @@ -27,8 +27,10 @@ project:
for-context:
- +AVH-SSE-300
- +AVH-SSE-310
- +AVH-SSE-315
- +AVH-SSE-300-U65
- +AVH-SSE-310-U65
- +AVH-SSE-315-U65
- +AVH-SSE-300-U55
- +AVH-SSE-310-U55
- +FRDM-K64F
Expand Down Expand Up @@ -65,13 +67,15 @@ project:
for-context:
- +AVH-SSE-300-U65
- +AVH-SSE-310-U65
- +AVH-SSE-315-U65

- file: src/kws_micronet_m.tflite.cpp
for-context:
- +FRDM-K64F
- +STM32F746-DISCO
- +AVH-SSE-300
- +AVH-SSE-310
- +AVH-SSE-315

- group: Device Files
files:
Expand All @@ -85,6 +89,10 @@ project:
- +AVH-SSE-310
- +AVH-SSE-310-U55
- +AVH-SSE-310-U65
- file: linker/mps4-sse-315.sct
for-context:
- +AVH-SSE-315
- +AVH-SSE-315-U65
- file: linker/frdm-k64f.sct
for-context: +FRDM-K64F
- file: linker/stm32f746-disco.sct
Expand All @@ -105,6 +113,8 @@ project:
- +AVH-SSE-310
- +AVH-SSE-310-U55
- +AVH-SSE-310-U65
- +AVH-SSE-315
- +AVH-SSE-315-U65

- layer: ../device/frdm-k64f/frdm-k64f-device.clayer.yml
for-context:
Expand Down
4 changes: 1 addition & 3 deletions cmsis-pack-examples/kws/linker/mps3-sse-300.sct
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
; Copyright (c) 2021-2022 Arm Limited. All rights reserved.
; SPDX-FileCopyrightText: Copyright 2021-2022, 2024 Arm Limited and/or its affiliates <[email protected]>
; SPDX-License-Identifier: Apache-2.0
;
; Licensed under the Apache License, Version 2.0 (the "License");
Expand All @@ -16,8 +16,6 @@
; *************************************************************
; *** Scatter-Loading Description File ***
; *************************************************************
; Please see docs/sections/appendix.md for memory mapping
; information.
;
; Note: Ethos-U NPU can access BRAM, internal SRAM and the DDR
; sections => activation buffers and the model should
Expand Down
5 changes: 1 addition & 4 deletions cmsis-pack-examples/kws/linker/mps3-sse-310.sct
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
; Copyright (c) 2021-2022 Arm Limited. All rights reserved.
; SPDX-FileCopyrightText: Copyright 2021-2022, 2024 Arm Limited and/or its affiliates <[email protected]>
; SPDX-License-Identifier: Apache-2.0
;
; Licensed under the Apache License, Version 2.0 (the "License");
Expand All @@ -16,14 +16,11 @@
; *************************************************************
; *** Scatter-Loading Description File ***
; *************************************************************
; Please see docs/sections/appendix.md for memory mapping
; information.
;
; Note: Ethos-U NPU can access BRAM, internal SRAM and the DDR
; sections => activation buffers and the model should
; only be placed in those regions.
;

;---------------------------------------------------------
; First load region (SRAM/BRAM) 2MiB region
;---------------------------------------------------------
Expand Down
Loading