This repository contains the projects from my YouTube series "FPGA For Fun".
This project is from the first two videos and covers the initial wiring of the Max7219 8-digit 7-segment display module. It contains the Lucid HDL code for the implementation as well as the transpiled Verilog source.
This project wires a Max7219 8-digit 7-segment display module to the Mojo FPGA and includes a multiple number base counter. The HDL being used is Lucid (the language for the Mojo from Embedded Micro). However, the transpiled Verilog sources are available in the /work/verilog subfolder.