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[mlir][OpenMP] inscan reduction modifier and scan op mlir support #114737

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Jan 22, 2025
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R5: Removing the check for matching scan variables and reduction vari…
…ables
  • Loading branch information
anchuraj committed Jan 15, 2025
commit 2adadc13e18269e08a4a2c93b77d8f2c62cda1ce
25 changes: 3 additions & 22 deletions mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3167,38 +3167,19 @@ LogicalResult ScanOp::verify() {
return emitError(
"Exactly one of EXCLUSIVE or INCLUSIVE clause is expected");
}
const OperandRange &scanVars =
hasExclusiveVars() ? getExclusiveVars() : getInclusiveVars();
auto verifyScanVarsInReduction = [&scanVars](ValueRange reductionVars) {
for (const auto &it : scanVars)
if (!llvm::is_contained(reductionVars, it))
return false;
return true;
};
if (mlir::omp::WsloopOp parentWsLoopOp =
(*this)->getParentOfType<mlir::omp::WsloopOp>()) {
if (parentWsLoopOp.getReductionModAttr() &&
parentWsLoopOp.getReductionModAttr().getValue() ==
mlir::omp::ReductionModifier::inscan) {
auto iface = llvm::cast<mlir::omp::BlockArgOpenMPOpInterface>(
parentWsLoopOp.getOperation());
if (!verifyScanVarsInReduction(iface.getReductionBlockArgs())) {
return emitError(
"List item should appear in REDUCTION clause of the parent");
}
return success();
}
} else if (mlir::omp::SimdOp parentSimdOp =
(*this)->getParentOfType<mlir::omp::SimdOp>()) {
}
if (mlir::omp::SimdOp parentSimdOp =
(*this)->getParentOfType<mlir::omp::SimdOp>()) {
if (parentSimdOp.getReductionModAttr() &&
parentSimdOp.getReductionModAttr().getValue() ==
mlir::omp::ReductionModifier::inscan) {
auto iface = llvm::cast<mlir::omp::BlockArgOpenMPOpInterface>(
parentSimdOp.getOperation());
if (!verifyScanVarsInReduction(iface.getReductionBlockArgs())) {
return emitError(
"List item should appear in REDUCTION clause of the parent");
}
return success();
}
}
Expand Down
27 changes: 0 additions & 27 deletions mlir/test/Dialect/OpenMP/invalid.mlir
Original file line number Diff line number Diff line change
Expand Up @@ -1837,33 +1837,6 @@ combiner {
omp.yield (%1 : f32)
}

func.func @scan_test_1(%lb: i32, %ub: i32, %step: i32) {
%test1f32 = "test.f32"() : () -> (!llvm.ptr)
%test2f32 = "test.f32"() : () -> (!llvm.ptr)
omp.wsloop reduction(mod:inscan, @add_f32 %test1f32 -> %arg1 : !llvm.ptr) {
omp.loop_nest (%i, %j) : i32 = (%lb, %ub) to (%ub, %lb) step (%step, %step) {
// expected-error @below {{List item should appear in REDUCTION clause of the parent}}
omp.scan inclusive(%test2f32 : !llvm.ptr)
omp.yield
}
}
return
}

// -----

omp.declare_reduction @add_f32 : f32
init {
^bb0(%arg: f32):
%0 = arith.constant 0.0 : f32
omp.yield (%0 : f32)
}
combiner {
^bb1(%arg0: f32, %arg1: f32):
%1 = arith.addf %arg0, %arg1 : f32
omp.yield (%1 : f32)
}

func.func @scan_test_2(%lb: i32, %ub: i32, %step: i32) {
%test1f32 = "test.f32"() : () -> (!llvm.ptr)
omp.wsloop reduction(mod:inscan, @add_f32 %test1f32 -> %arg1 : !llvm.ptr) {
Expand Down
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