nrfconnect · adamkondraciuk · May 27, 2025
diff --git a/samples/drivers/i2s/output/boards/nrf54h20dk_nrf54h20_cpuapp.overlay b/samples/drivers/i2s/output/boards/nrf54h20dk_nrf54h20_cpuapp.overlay
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* i2s-node0 is the transmitter/receiver */
+
+/ {
+	aliases {
+		i2s-tx = &tdm130;
+	};
+};
+
+&pinctrl {
+    tdm130_default_alt: tdm130_default_alt {
+        group1 {
+            psels = <NRF_PSEL(TDM_SCK_M, 1, 3)>,
+                <NRF_PSEL(TDM_FSYNC_M, 1, 6)>,
+                <NRF_PSEL(TDM_SDOUT, 1, 4)>,
+                <NRF_PSEL(TDM_SDIN, 1, 5)>,
+                <NRF_PSEL(TDM_MCK, 1, 2)>; /* Define MCLK pin */
+        };
+    };
+};
+
+&tdm130 {
+    status = "okay";
+    pinctrl-0 = <&tdm130_default_alt>;
+    pinctrl-names = "default";
+    memory-regions = <&cpuapp_dma_region>;
+    mck-frequency = <6144000>;
+    mck-clock-source = "ACLK";
+    sck-clock-source = "ACLK";
+};
+
+&audiopll {
+    status = "okay";
+    frequency = <NRFS_AUDIOPLL_FREQ_AUDIO_44K1>;
+};
+// #define NRFS_AUDIOPLL_FREQ_AUDIO_44K1 11289591
diff --git a/samples/drivers/i2s/output/src/main.c b/samples/drivers/i2s/output/src/main.c
@@ -8,6 +8,7 @@
 #include <zephyr/kernel.h>
 #include <zephyr/drivers/i2s.h>
 #include <zephyr/sys/iterable_sections.h>
+#include <zephyr/linker/devicetree_regions.h>
 
 #define SAMPLE_NO 64
 
@@ -40,7 +41,7 @@
 	}
 }
 
-#define NUM_BLOCKS 20
+#define NUM_BLOCKS 5
 #define BLOCK_SIZE (2 * sizeof(data))
 
 #ifdef CONFIG_NOCACHE_MEMORY
@@ -49,9 +50,21 @@
 	#define MEM_SLAB_CACHE_ATTR
 #endif /* CONFIG_NOCACHE_MEMORY */
 
+#define TDM(idx)                       DT_NODELABEL(tdm##idx)
+#define TDM_PROP(idx, prop)            DT_PROP(TDM(idx), prop)
+#define TDM_HAS_PROP(idx, prop)        DT_NODE_HAS_PROP(TDM(idx), prop)
+
+#define TDM_MEMORY_SECTION(idx)                                               \
+       COND_CODE_1(TDM_HAS_PROP(idx, memory_regions),                         \
+               (__attribute__((__section__(LINKER_DT_NODE_REGION_NAME(        \
+                       DT_PHANDLE(TDM(idx), memory_regions)))))),             \
+               ())
+
+#define BUFFER_MEM_REGION __attribute__((__section__("cpuapp_dma_region")))
+
 static char MEM_SLAB_CACHE_ATTR __aligned(WB_UP(32))
-	_k_mem_slab_buf_tx_0_mem_slab[(NUM_BLOCKS) * WB_UP(BLOCK_SIZE)];
+	_k_mem_slab_buf_tx_0_mem_slab[(NUM_BLOCKS) * WB_UP(BLOCK_SIZE)] TDM_MEMORY_SECTION(130);
 
 static STRUCT_SECTION_ITERABLE(k_mem_slab, tx_0_mem_slab) =
 	Z_MEM_SLAB_INITIALIZER(tx_0_mem_slab, _k_mem_slab_buf_tx_0_mem_slab,
 				WB_UP(BLOCK_SIZE), NUM_BLOCKS);
@@ -70,8 +83,8 @@
 	}
 	/* Configure I2S stream */
 	i2s_cfg.word_size = 16U;
-	i2s_cfg.channels = 2U;
-	i2s_cfg.format = I2S_FMT_DATA_FORMAT_I2S;
+	i2s_cfg.channels = 4U;
+	i2s_cfg.format = I2S_FMT_DATA_FORMAT_PCM_SHORT;
 	i2s_cfg.frame_clk_freq = 44100;
 	i2s_cfg.block_size = BLOCK_SIZE;
 	i2s_cfg.timeout = 2000;

diff --git a/tests/drivers/i2s/i2s_api/src/common.c b/tests/drivers/i2s/i2s_api/src/common.c
@@ -8,10 +8,33 @@
 #include <zephyr/ztest.h>
 #include <zephyr/drivers/i2s.h>
 #include "i2s_api_test.h"
+#include <zephyr/linker/devicetree_regions.h>
 
-K_MEM_SLAB_DEFINE(rx_mem_slab, BLOCK_SIZE, NUM_RX_BLOCKS, 32);
-K_MEM_SLAB_DEFINE(tx_mem_slab, BLOCK_SIZE, NUM_TX_BLOCKS, 32);
+#define TDM(idx)                       DT_NODELABEL(tdm##idx)
+#define TDM_PROP(idx, prop)            DT_PROP(TDM(idx), prop)
+#define TDM_HAS_PROP(idx, prop)        DT_NODE_HAS_PROP(TDM(idx), prop)
+
+
+#define TDM_MEMORY_SECTION(idx)                                               \
+       COND_CODE_1(TDM_HAS_PROP(idx, memory_regions),                         \
+               (__attribute__((__section__(LINKER_DT_NODE_REGION_NAME(        \
+                       DT_PHANDLE(TDM(idx), memory_regions)))))),             \
+               ())
+
+#define BUFFER_MEM_REGION __attribute__((__section__("cpuapp_dma_region")))
+
+char  __aligned(WB_UP(32))
+       _k_mem_slab_buf_rx_mem_slab[(NUM_RX_BLOCKS + 2) * WB_UP(BLOCK_SIZE)] TDM_MEMORY_SECTION(130);
+STRUCT_SECTION_ITERABLE(k_mem_slab, rx_mem_slab) =
+       Z_MEM_SLAB_INITIALIZER(rx_mem_slab, _k_mem_slab_buf_rx_mem_slab,
+                               WB_UP(BLOCK_SIZE), NUM_RX_BLOCKS + 2);
+
+char  __aligned(WB_UP(32))
+       _k_mem_slab_buf_tx_mem_slab[(NUM_TX_BLOCKS) * WB_UP(BLOCK_SIZE)] TDM_MEMORY_SECTION(130);
+STRUCT_SECTION_ITERABLE(k_mem_slab, tx_mem_slab) =
+       Z_MEM_SLAB_INITIALIZER(tx_mem_slab, _k_mem_slab_buf_tx_mem_slab,
+                               WB_UP(BLOCK_SIZE), NUM_TX_BLOCKS);
 
 /* The data_l represent a sine wave */
 ZTEST_DMEM int16_t data_l[SAMPLE_NO] = {
 	  6392,  12539,  18204,  23169,  27244,  30272,  32137,  32767,  32137,

diff --git a/tests/drivers/i2s/i2s_speed/src/test_i2s_speed.c b/tests/drivers/i2s/i2s_speed/src/test_i2s_speed.c
@@ -9,6 +9,7 @@
 #include <zephyr/ztest.h>
 #include <zephyr/drivers/i2s.h>
 #include <zephyr/sys/iterable_sections.h>
+#include <zephyr/linker/devicetree_regions.h>
 
 #define I2S_DEV_NODE_RX DT_ALIAS(i2s_node0)
 #ifdef CONFIG_I2S_TEST_SEPARATE_DEVICES
@@ -17,7 +18,7 @@
 #define I2S_DEV_NODE_TX DT_ALIAS(i2s_node0)
 #endif
 
-#define NUM_BLOCKS 20
+#define NUM_BLOCKS 5
 #define SAMPLE_NO 64
 
 /* The data_l represent a sine wave */
@@ -58,15 +59,28 @@
  * RX blocks to satisfy this requirement
  */
 
+#define TDM(idx)                       DT_NODELABEL(tdm##idx)
+#define TDM_PROP(idx, prop)            DT_PROP(TDM(idx), prop)
+#define TDM_HAS_PROP(idx, prop)        DT_NODE_HAS_PROP(TDM(idx), prop)
+
+
+#define TDM_MEMORY_SECTION(idx)                                               \
+       COND_CODE_1(TDM_HAS_PROP(idx, memory_regions),                         \
+               (__attribute__((__section__(LINKER_DT_NODE_REGION_NAME(        \
+                       DT_PHANDLE(TDM(idx), memory_regions)))))),             \
+               ())
+
+#define BUFFER_MEM_REGION __attribute__((__section__("cpuapp_dma_region")))
+
 char MEM_SLAB_CACHE_ATTR __aligned(WB_UP(32))
-	_k_mem_slab_buf_rx_0_mem_slab[(NUM_BLOCKS + 2) * WB_UP(BLOCK_SIZE)];
+	_k_mem_slab_buf_rx_0_mem_slab[(NUM_BLOCKS + 2) * WB_UP(BLOCK_SIZE)] TDM_MEMORY_SECTION(130);
 STRUCT_SECTION_ITERABLE(k_mem_slab, rx_0_mem_slab) =
 	Z_MEM_SLAB_INITIALIZER(rx_0_mem_slab, _k_mem_slab_buf_rx_0_mem_slab,
 				WB_UP(BLOCK_SIZE), NUM_BLOCKS + 2);
 
 char MEM_SLAB_CACHE_ATTR __aligned(WB_UP(32))
-	_k_mem_slab_buf_tx_0_mem_slab[(NUM_BLOCKS) * WB_UP(BLOCK_SIZE)];
+	_k_mem_slab_buf_tx_0_mem_slab[(NUM_BLOCKS) * WB_UP(BLOCK_SIZE)] TDM_MEMORY_SECTION(130);
 STRUCT_SECTION_ITERABLE(k_mem_slab, tx_0_mem_slab) =
 	Z_MEM_SLAB_INITIALIZER(tx_0_mem_slab, _k_mem_slab_buf_tx_0_mem_slab,
 				WB_UP(BLOCK_SIZE), NUM_BLOCKS);