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11cfc16
mir-opt: Use one MirPatch in MatchBranchSimplification
dianqk Apr 20, 2025
5881b7c
mir-opt: execute MatchBranchSimplification after GVN
dianqk Apr 21, 2025
8290766
bypass linker configuration and cross target check on `x check`
onur-ozkan Apr 27, 2025
7669d50
add a FIXME
onur-ozkan Apr 28, 2025
5f14568
std: get rid of `sys_common::process`
joboet Mar 27, 2025
0f81fca
Change rustc_driver dependency on stable_mir crate
celinval Apr 30, 2025
6970813
Use less rustc_type_ir in the compiler codebase
rperier May 1, 2025
de44231
implement `PanicTracker` to track `t` panics
onur-ozkan May 4, 2025
08ce912
Consistent trait bounds for ExtractIf Debug impls
dtolnay Mar 15, 2025
a8f7fd1
update `cc_detect` tests
onur-ozkan May 5, 2025
4b58c50
Make -Zfixed-x18 into a target modifier
Darksonn May 5, 2025
3a1ee64
Resolve instance for SymFn in global/naked asm
compiler-errors Apr 27, 2025
833c212
Rename Instance::new to Instance::new_raw and add a note that it is raw
compiler-errors Apr 28, 2025
6621826
Implement RFC 3503: frontmatters
fee1-dead Apr 12, 2025
f58c7b9
Rollup merge of #139764 - dtolnay:extractif, r=Amanieu
GuillaumeGomez May 5, 2025
2572dc6
Rollup merge of #140035 - fee1-dead-contrib:push-oszwkkvmpkks, r=jiey…
GuillaumeGomez May 5, 2025
c17ea8d
Rollup merge of #140080 - dianqk:one-mirpatch, r=oli-obk
GuillaumeGomez May 5, 2025
8371f66
Rollup merge of #140115 - dianqk:gvn-matchbr, r=oli-obk
GuillaumeGomez May 5, 2025
986ebd3
Rollup merge of #140357 - onur-ozkan:133840, r=clubby789
GuillaumeGomez May 5, 2025
859591d
Rollup merge of #140374 - compiler-errors:global_asm-bug, r=lcnr
GuillaumeGomez May 5, 2025
9e314cb
Rollup merge of #140393 - joboet:sys_common_process, r=thomcc
GuillaumeGomez May 5, 2025
cd789a2
Rollup merge of #140532 - celinval:chores-smir-ra, r=oli-obk
GuillaumeGomez May 5, 2025
f403c92
Rollup merge of #140559 - rperier:type-ir-to-type-middle, r=compiler-…
GuillaumeGomez May 5, 2025
d7746ad
Rollup merge of #140636 - onur-ozkan:panic-tracker-for-t-macro, r=Kobzol
GuillaumeGomez May 5, 2025
5b2887b
Rollup merge of #140661 - Darksonn:fixedx18-tm, r=wesleywiser
GuillaumeGomez May 5, 2025
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mir-opt: execute MatchBranchSimplification after GVN
This can provide more opportunities for MatchBranchSimplification.
  • Loading branch information
dianqk committed Apr 21, 2025
commit 5881b7c68b353c3723133c43f209802b3a0c9621
3 changes: 1 addition & 2 deletions compiler/rustc_mir_transform/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -699,8 +699,6 @@ fn run_optimization_passes<'tcx>(tcx: TyCtxt<'tcx>, body: &mut Body<'tcx>) {
// Now, we need to shrink the generated MIR.
&ref_prop::ReferencePropagation,
&sroa::ScalarReplacementOfAggregates,
&match_branches::MatchBranchSimplification,
// inst combine is after MatchBranchSimplification to clean up Ne(_1, false)
&multiple_return_terminators::MultipleReturnTerminators,
// After simplifycfg, it allows us to discover new opportunities for peephole
// optimizations.
Expand All @@ -709,6 +707,7 @@ fn run_optimization_passes<'tcx>(tcx: TyCtxt<'tcx>, body: &mut Body<'tcx>) {
&dead_store_elimination::DeadStoreElimination::Initial,
&gvn::GVN,
&simplify::SimplifyLocals::AfterGVN,
&match_branches::MatchBranchSimplification,
&dataflow_const_prop::DataflowConstProp,
&single_use_consts::SingleUseConsts,
&o1(simplify_branches::SimplifyConstCondition::AfterConstProp),
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -8,9 +8,9 @@
let mut _3: u16;
let mut _4: u32;
+ scope 1 (inlined core::num::<impl u16>::unchecked_shl) {
+ let mut _5: bool;
+ let _6: ();
+ let _5: ();
+ scope 2 (inlined core::ub_checks::check_language_ub) {
+ let mut _6: bool;
+ scope 3 (inlined core::ub_checks::check_language_ub::runtime) {
+ }
+ }
Expand All @@ -22,20 +22,20 @@
StorageLive(_4);
_4 = copy _2;
- _0 = core::num::<impl u16>::unchecked_shl(move _3, move _4) -> [return: bb1, unwind unreachable];
+ StorageLive(_6);
+ StorageLive(_5);
+ _5 = UbChecks();
+ switchInt(move _5) -> [0: bb2, otherwise: bb1];
+ StorageLive(_6);
+ _6 = UbChecks();
+ switchInt(copy _6) -> [0: bb2, otherwise: bb1];
}

bb1: {
+ _6 = core::num::<impl u16>::unchecked_shl::precondition_check(copy _4) -> [return: bb2, unwind unreachable];
+ _5 = core::num::<impl u16>::unchecked_shl::precondition_check(copy _4) -> [return: bb2, unwind unreachable];
+ }
+
+ bb2: {
+ StorageDead(_5);
+ _0 = ShlUnchecked(copy _3, copy _4);
+ StorageDead(_6);
+ StorageDead(_5);
StorageDead(_4);
StorageDead(_3);
return;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -8,9 +8,9 @@
let mut _3: u16;
let mut _4: u32;
+ scope 1 (inlined core::num::<impl u16>::unchecked_shl) {
+ let mut _5: bool;
+ let _6: ();
+ let _5: ();
+ scope 2 (inlined core::ub_checks::check_language_ub) {
+ let mut _6: bool;
+ scope 3 (inlined core::ub_checks::check_language_ub::runtime) {
+ }
+ }
Expand All @@ -22,20 +22,20 @@
StorageLive(_4);
_4 = copy _2;
- _0 = core::num::<impl u16>::unchecked_shl(move _3, move _4) -> [return: bb1, unwind continue];
+ StorageLive(_6);
+ StorageLive(_5);
+ _5 = UbChecks();
+ switchInt(move _5) -> [0: bb2, otherwise: bb1];
+ StorageLive(_6);
+ _6 = UbChecks();
+ switchInt(copy _6) -> [0: bb2, otherwise: bb1];
}

bb1: {
+ _6 = core::num::<impl u16>::unchecked_shl::precondition_check(copy _4) -> [return: bb2, unwind unreachable];
+ _5 = core::num::<impl u16>::unchecked_shl::precondition_check(copy _4) -> [return: bb2, unwind unreachable];
+ }
+
+ bb2: {
+ StorageDead(_5);
+ _0 = ShlUnchecked(copy _3, copy _4);
+ StorageDead(_6);
+ StorageDead(_5);
StorageDead(_4);
StorageDead(_3);
return;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -8,9 +8,9 @@
let mut _3: i64;
let mut _4: u32;
+ scope 1 (inlined core::num::<impl i64>::unchecked_shr) {
+ let mut _5: bool;
+ let _6: ();
+ let _5: ();
+ scope 2 (inlined core::ub_checks::check_language_ub) {
+ let mut _6: bool;
+ scope 3 (inlined core::ub_checks::check_language_ub::runtime) {
+ }
+ }
Expand All @@ -22,20 +22,20 @@
StorageLive(_4);
_4 = copy _2;
- _0 = core::num::<impl i64>::unchecked_shr(move _3, move _4) -> [return: bb1, unwind unreachable];
+ StorageLive(_6);
+ StorageLive(_5);
+ _5 = UbChecks();
+ switchInt(move _5) -> [0: bb2, otherwise: bb1];
+ StorageLive(_6);
+ _6 = UbChecks();
+ switchInt(copy _6) -> [0: bb2, otherwise: bb1];
}

bb1: {
+ _6 = core::num::<impl i64>::unchecked_shr::precondition_check(copy _4) -> [return: bb2, unwind unreachable];
+ _5 = core::num::<impl i64>::unchecked_shr::precondition_check(copy _4) -> [return: bb2, unwind unreachable];
+ }
+
+ bb2: {
+ StorageDead(_5);
+ _0 = ShrUnchecked(copy _3, copy _4);
+ StorageDead(_6);
+ StorageDead(_5);
StorageDead(_4);
StorageDead(_3);
return;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -8,9 +8,9 @@
let mut _3: i64;
let mut _4: u32;
+ scope 1 (inlined core::num::<impl i64>::unchecked_shr) {
+ let mut _5: bool;
+ let _6: ();
+ let _5: ();
+ scope 2 (inlined core::ub_checks::check_language_ub) {
+ let mut _6: bool;
+ scope 3 (inlined core::ub_checks::check_language_ub::runtime) {
+ }
+ }
Expand All @@ -22,20 +22,20 @@
StorageLive(_4);
_4 = copy _2;
- _0 = core::num::<impl i64>::unchecked_shr(move _3, move _4) -> [return: bb1, unwind continue];
+ StorageLive(_6);
+ StorageLive(_5);
+ _5 = UbChecks();
+ switchInt(move _5) -> [0: bb2, otherwise: bb1];
+ StorageLive(_6);
+ _6 = UbChecks();
+ switchInt(copy _6) -> [0: bb2, otherwise: bb1];
}

bb1: {
+ _6 = core::num::<impl i64>::unchecked_shr::precondition_check(copy _4) -> [return: bb2, unwind unreachable];
+ _5 = core::num::<impl i64>::unchecked_shr::precondition_check(copy _4) -> [return: bb2, unwind unreachable];
+ }
+
+ bb2: {
+ StorageDead(_5);
+ _0 = ShrUnchecked(copy _3, copy _4);
+ StorageDead(_6);
+ StorageDead(_5);
StorageDead(_4);
StorageDead(_3);
return;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -10,9 +10,9 @@
+ scope 2 {
+ }
+ scope 3 (inlined unreachable_unchecked) {
+ let mut _4: bool;
+ let _5: ();
+ let _4: ();
+ scope 4 (inlined core::ub_checks::check_language_ub) {
+ let mut _5: bool;
+ scope 5 (inlined core::ub_checks::check_language_ub::runtime) {
+ }
+ }
Expand All @@ -24,7 +24,7 @@
_2 = move _1;
- _0 = Option::<T>::unwrap_unchecked(move _2) -> [return: bb1, unwind unreachable];
+ StorageLive(_3);
+ StorageLive(_5);
+ StorageLive(_4);
+ _3 = discriminant(_2);
+ switchInt(move _3) -> [0: bb2, 1: bb3, otherwise: bb1];
}
Expand All @@ -34,15 +34,15 @@
+ }
+
+ bb2: {
+ StorageLive(_4);
+ _4 = UbChecks();
+ assume(copy _4);
+ _5 = unreachable_unchecked::precondition_check() -> [return: bb1, unwind unreachable];
+ StorageLive(_5);
+ _5 = UbChecks();
+ assume(copy _5);
+ _4 = unreachable_unchecked::precondition_check() -> [return: bb1, unwind unreachable];
+ }
+
+ bb3: {
+ _0 = move ((_2 as Some).0: T);
+ StorageDead(_5);
+ StorageDead(_4);
+ StorageDead(_3);
StorageDead(_2);
return;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -10,9 +10,9 @@
+ scope 2 {
+ }
+ scope 3 (inlined unreachable_unchecked) {
+ let mut _4: bool;
+ let _5: ();
+ let _4: ();
+ scope 4 (inlined core::ub_checks::check_language_ub) {
+ let mut _5: bool;
+ scope 5 (inlined core::ub_checks::check_language_ub::runtime) {
+ }
+ }
Expand All @@ -24,7 +24,7 @@
_2 = move _1;
- _0 = Option::<T>::unwrap_unchecked(move _2) -> [return: bb1, unwind: bb2];
+ StorageLive(_3);
+ StorageLive(_5);
+ StorageLive(_4);
+ _3 = discriminant(_2);
+ switchInt(move _3) -> [0: bb2, 1: bb3, otherwise: bb1];
}
Expand All @@ -38,15 +38,15 @@
- bb2 (cleanup): {
- resume;
+ bb2: {
+ StorageLive(_4);
+ _4 = UbChecks();
+ assume(copy _4);
+ _5 = unreachable_unchecked::precondition_check() -> [return: bb1, unwind unreachable];
+ StorageLive(_5);
+ _5 = UbChecks();
+ assume(copy _5);
+ _4 = unreachable_unchecked::precondition_check() -> [return: bb1, unwind unreachable];
+ }
+
+ bb3: {
+ _0 = move ((_2 as Some).0: T);
+ StorageDead(_5);
+ StorageDead(_4);
+ StorageDead(_3);
+ StorageDead(_2);
+ return;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -10,9 +10,9 @@
scope 2 {
}
scope 3 (inlined unreachable_unchecked) {
let mut _4: bool;
let _5: ();
let _4: ();
scope 4 (inlined core::ub_checks::check_language_ub) {
let mut _5: bool;
scope 5 (inlined core::ub_checks::check_language_ub::runtime) {
}
}
Expand All @@ -23,7 +23,7 @@
StorageLive(_2);
_2 = copy _1;
StorageLive(_3);
StorageLive(_5);
StorageLive(_4);
_3 = discriminant(_2);
switchInt(move _3) -> [0: bb2, 1: bb3, otherwise: bb1];
}
Expand All @@ -33,16 +33,16 @@
}

bb2: {
StorageLive(_4);
- _4 = UbChecks();
+ _4 = const false;
assume(copy _4);
_5 = unreachable_unchecked::precondition_check() -> [return: bb1, unwind unreachable];
StorageLive(_5);
- _5 = UbChecks();
+ _5 = const false;
assume(copy _5);
_4 = unreachable_unchecked::precondition_check() -> [return: bb1, unwind unreachable];
}

bb3: {
_0 = move ((_2 as Some).0: i32);
StorageDead(_5);
StorageDead(_4);
StorageDead(_3);
StorageDead(_2);
return;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -5,23 +5,18 @@
debug bytes => _1;
let mut _0: std::option::Option<[u8; 4]>;
let _2: [u32; 4];
let mut _3: [u8; 16];
let mut _5: [u8; 4];
let mut _6: u32;
let mut _4: [u8; 4];
scope 1 {
debug dwords => _2;
scope 2 {
debug ip => _4;
let _4: u32;
debug ip => _3;
let _3: u32;
}
}

bb0: {
StorageLive(_2);
StorageLive(_3);
_3 = copy _1;
_2 = move _3 as [u32; 4] (Transmute);
StorageDead(_3);
_2 = copy _1 as [u32; 4] (Transmute);
switchInt(copy _2[0 of 4]) -> [0: bb1, otherwise: bb4];
}

Expand All @@ -34,15 +29,10 @@
}

bb3: {
_3 = copy _2[3 of 4];
StorageLive(_4);
_4 = copy _2[3 of 4];
StorageLive(_5);
StorageLive(_6);
_6 = copy _4;
_5 = move _6 as [u8; 4] (Transmute);
StorageDead(_6);
_0 = Option::<[u8; 4]>::Some(move _5);
StorageDead(_5);
_4 = copy _3 as [u8; 4] (Transmute);
_0 = Option::<[u8; 4]>::Some(move _4);
StorageDead(_4);
goto -> bb5;
}
Expand Down
13 changes: 13 additions & 0 deletions tests/mir-opt/pre-codegen/matchbr.match1.PreCodegen.after.mir
Original file line number Diff line number Diff line change
@@ -0,0 +1,13 @@
// MIR for `match1` after PreCodegen

fn match1(_1: bool, _2: i32, _3: i32) -> i32 {
debug c => _1;
debug v1 => _2;
debug v2 => _3;
let mut _0: i32;

bb0: {
_0 = Sub(copy _2, copy _3);
return;
}
}
10 changes: 10 additions & 0 deletions tests/mir-opt/pre-codegen/matchbr.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,10 @@
#![crate_type = "lib"]

// EMIT_MIR matchbr.match1.PreCodegen.after.mir
pub fn match1(c: bool, v1: i32, v2: i32) -> i32 {
// CHECK-LABEL: fn match1(
// CHECK: bb0:
// CHECK-NEXT: _0 = Sub
// CHECK-NEXT: return;
if c { v1 - v2 } else { v1 - v2 }
}
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,9 @@
let mut _3: std::option::Option<T>;
let mut _4: isize;
let mut _5: isize;
- let mut _7: bool;
- let mut _8: u8;
- let mut _9: bool;
scope 1 {
debug a => _6;
let _6: u8;
Expand All @@ -32,9 +35,7 @@
}

bb2: {
StorageLive(_6);
_6 = copy (((_1.0: std::option::Option<u8>) as Some).0: u8);
StorageDead(_6);
goto -> bb3;
}

Expand Down
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