Flyback Converter Design Guide
Flyback Converter Design Guide
Submitted by
T.Vignesh Nayak 1RV14EE055
CERTIFICATE
Certified that the major project titled ‘Design and development of Flyback
converter Topology’ is carried out by T.Vignesh Nayak (1RV14EE055) who is
bona-fide student of R.V College of Engineering, Bangalore, in partial fulfillment
for the award of degree of Bachelor of Engineering in Electrical and Electronics
Engineering of RVCE, Bangalore. It is certified that all corrections/suggestions
indicated for the internal Assessment have been incorporated in the report deposited
in the departmental library. The project report has been approved as it satisfies the
academic requirements in respect of project work prescribed by the institution for
the said degree.
External Viva
Name of examiners Signature with date
1
2
R.V. COLLEGE OF ENGINEERING, BENGALURU - 560059
(Autonomous Institution Affiliated to VTU, Belgaum)
Department of Electrical & Electronics Engineering
DECLARATION
th
I, T.Vignesh Nayak student of 8 semester B.E., Electrical and Electronics
Engineering, hereby declare that the project titled “Design and development of
Flyback Converter” has been carried out by me and submitted in partial
fulfillment of the program requirements for the award of degree in Bachelor of
Engineering in Electrical and Electronics Engineering of the Visvesvaraya
Technological University, Belgaum during the year 2017-2018.
Further I declare that the content of the dissertation has not been submitted
previously by anybody for the award of any degree or diploma to any other
University.
Place: Bengaluru
I also extend my cordial thanks to Secure Meters Ltd, Udaipur for providing
me an opportunity to carry out internship in its organization. I would also like to
thank my guide Harshil Patel (R&D, SML Udaipur) for his supervision. I am
very grateful to Mr. Venkata Srinivas (Hardware design, SML Udaipur),
Sumit Lohan(Hardware design, SML Udaipur), and Mr. Kamal Prajapati
(Application Engineering, SMLS Udaipur) for their constant help and support
without them this project would have been incomplete. A special thanks to
Florian Hämmerle (Product Manager, OMICRON Lab Austria) for his advices
regarding Bode 100.
I thank my parents for their constant support and encouragement. Last but not
the least I thank my peers and friends who provided me with the valuable input.
T.Vignesh Nayak
R. V. College of Engineering, Bengaluru-59
ABSTRACT
The Meter which is connected to the electric network needs power controlling and
power conversion for its operation. Normally if the equipment is DC and input is AC,
rectifier is needed which sometimes will give a lot of ripple. Switched mode power
supply (SMPS) is used for effective conversion from AC to DC. SMPS has two
topology Isolated and Non-isolated. This thesis addresses Fly back converter which
belongs to isolated topology. This work addresses challenges faced in developing 20
W and two output fly back converter. Normally fly back transformer has only 75%
efficiency. In order to increase the efficiency it is necessary to decide the mode in
which converter should run among continuous mode, discontinuous mode and critical
conduction mode. Every mode has its own advantages and disadvantages. This work
addresses advantages of critical conduction mode and controller is chosen accordingly.
Reducing the switching losses MOSFET efficiency can be increased hence in this
work quasi resonant mode is adopted which is done by UCC28600 controller which
drives MOSFET. Transformer core must operate in near saturation region. Also
transformer must have less leakage inductance so that most of the energy transfers to
the secondary. Transformer parasitic parameters are calculated using the Bode 100.
Simulation of transformer was also carried out using Pexprt. Feedback design must be
proper in order to regulate the output voltage properly. Type 2 compensator is used to
give additional gain and phase margin. Snubber and clamp circuit were designed
properly to reduce transient and to limit the voltage across winding. PCB design was
carried out using Altium software. Circuit is tested for its stability using Bode 100 and
varied line and load condition to check for proper working. Simulation is done using
TINA-TI.
Test results shows more than 80% efficiency in full load condition for input voltage
from 85V AC to 265V AC. It also shows ripple voltage of 0.1mV and output
maintains 30V and 50V under variable load condition. Project work exhibits good
performance at low cost of less than 100Rs. This work justified the development of a
fly back transformer with high efficiency with multiple outputs.
Table of Contents
Abstract……………………………………………………………………..................i
Table of Contents…………………………………………………………..……...….ii
List of Symbols………………………………………………………………..............v
List of Abbreviations……….…………………………….....……………..................ix
List of Tables…………………………………………………………………...…….xi
List of Figures……………………………………………………………..................xii
CHAPTER 1
INTRODUCTION…………………………………………………………….……....1
1.3 Motivation.................................................................................................................3
1.6 Methodology………………………………………………………….……….…...4
CHAPTER 2
FLYBACK TOPOLOGY…………..............…………………………………….…..6
2.4 UCC28600………………………………………………………………………..11
CHAPTER 3
SYSTEM DESIGNING……………………………………………………………..14
3.1 Methodology…………………………………………………………………..….14
3.3 Specification…………………………………………………………………........15
CHAPTER 4
5.1 TL431…………………………………………………………………………......46
CHAPTER 5
HARDWARE IMPLEMENTATION…………...…………………………….…...52
6.4 Results……………………………………………………………………….…....57
CHAPTER 6
7.1 Conclusion………………………………………………………………………...61
REFERENCES…………………………………………………………………..…..63
APPENDIX……………………………………………………………………..........67
APPENDIX 1………………………………………………………………………...68
List of Symbols
α - Percentage regulation
η - Efficiency
AL - Inductance factor
AP - Area product
B -Magnetic field
C - Capacitor
C1 - Compensating capacitor
C2 - Compensating capacitor
D - Duty cycle
E - Energy
Ff - Fringing factor
FP - Pole frequency
Fr - Ringing frequency
FZ - Zero frequency
J - Current density
Ke - Electrical constant
Kg - Core geometry
R2 - Compensating resistor
RL - Load resistor
Sd - Skin depth
T - Transfer function
XL - Inductive reactance
XC - Capacitor reactance
List of Abbreviations
AC - Alternating Current
CS - Current Sense
DC - Direct Current
FB - Feedback
GND - Ground
PC - Personal Computer
SS - Soft Start
List of Tables
List of Figures
Fig. 2.7 Model of UCC28600 under different line and load condition 12
self capacitance 45
CHAPTER 1
INTRODUCTION
This Chapter includes brief introduction related to AC-DC conversion, discussion
about isolated and non-isolated topology. Extensive literature survey on SMPS based
on Flyback topology and its modes of conduction, transformer design, and controller
design. It also includes research motivation, problem statement, methodology and
objectives that have been considered.
SMPS has few disadvantages compared to linear regulator. SMPS is noise sensitive
and design is complex. Apart from these two disadvantage in most of the cases
industry prefer SMPS over linear regulator. Mainly two types of SMPS are there,
namely Isolated and Non-Isolated. Non isolated topology is simple and consist of
generally one inductor but it is not used in consumer product because of non-isolation.
Buck, Boost, Cuk are the best example of non-isolated topology. These topologies
does not provide isolation. Isolated topology normally consists of transformer or
optocoupler for isolation. Flyback, Push pull, forward are the examples of non-isolated
topology. Because of isolation it is preferred in charger and portable devices.
Normally in electric meter, isolation and multiple output are the main concern, flyback
topology is the best choice [2].
T-Y Ho M-S chen et al[4] discussed about different type of topologies and analysis
each of topology. It also discusses about flyback topology and how it works. The work
includes a design of Flyback converter. This work shows design consideration to take
in order to build efficient flyback transformer. This work also explains number of
ways to improve efficiency. It also discusses about active clamp, quasi resonant mode
and parasitic element which affects SMPS efficiency.
Lisa Dinwoodie et al[5]discussed quasi resonant mode. This work explores advantages
and disadvantages in quasi resonant mode and it explains practical difficulties in quasi
resonant mode. It explains how to select controller for quasi resonant mode and
explains about frequency fold back mode. Finally it gives design example to create
efficient Flyback converter.
Colonel Wm. T. McLyman et al[6] discussed about flyback transformer and it types. It
discusses about material property different core types and their advantage and
disadvantage. This work shows how to design transformer with high efficiency and
how to make trade off based on design consideration. This work shows different
techniques to reduce leakage inductance, interwinding capacitance and other parasitic
element. It also shows how to model transformer. It explains about selection of wire,
window utilization factor, effect of high frequency, effect of parasitic on transformer.
It shows different design example and design consideration to design a transformer.
Ray Ridley et al[7] discussed about snubber design. This work explains how design
RC and RCD snubber based on the system requirements. This work explains effect of
parasitic element on snubber. This work shows how the efficiency of power supply
can be affected by inappropriate snubber choice.
Laszlo Balogh et al[9] discussed about MOSFET characteristics and their effect on
power supply. It explains MOSFET characteristics, parasitic capacitances, switching
losses. It shows how miller effect can change threshold voltage of MOSFET. It
explains different driver circuit direct drive circuit. This work shows how to vary
turn on and turn off speed of MOSFET and reduce switching losses.
Dan Mitchell et al[10] discussed control strategy for power supply. This work first
explains about control strategy for buck converter for continuous conduction mode,
discontinuous conduction mode. It shows different control algorithm and what is its
effect on power supply. This work shows how to design a stable system and
compensator for a given system.
1.3 Motivation
At end of 20th century household electronics grew rapidly. It contains non-linear load.
Nonlinear load injected harmonics into the grid and caused poor efficiency and power
factor. So the converting and controlling of electric power became major issue. At the
beginning of 21st century because of energy crisis efficiency of the electronic
equipment became important.
Transformer design must be proper so that it can have less leakage inductance.
Selection of wires based on calculation of current density, the way of winding.
Selection of core play an important role. Finally the switching losses. MOSFET must
have less switching losses this can be achieved by soft switching. These problems
need to be addressed so that is the reason this project has been taken up. By
implementing all these we can implement high efficiency low cost flyback converter
with multiple output which can meet industrial standards.
1.6 Methodology
Based on literature review, flyback converter can be build which can be reliable, cost
effective, and efficient. The project is undertaken in order to increase the efficiency,
reduce ripple, maintain regulation irrespective of load regulation and mitigate cross
regulation.
Every design need input specification. In this project input range chosen as universal
input and output is specified as 30V and 0.5A (15Watt) and 50V and 0.1A (5Watt).
Quasi resonant mode is selected in order to reduce switching losses and UCC28600 IC
drives MOSFET. Reflected voltage considered based on stress on primary and
secondary side. Based on reflected voltage and minimum duty cycle transformer turns
is decided. Core selection done based on wattage and window area. After this
transformer constructed with interleaved winding to reduce leakage inductance. After
this leakage inductance measured and snubber design must be completed accordingly.
According to input and output specification input capacitor, output capacitor diodes
are selected. MOSFET selection is made based on voltage stress.
Based on UCC28600 requirements current sense resistor, power limit resistor, line and
load overvoltage resistor selected according to electrical characteristics specified in the
datasheet. Finally closed loop design must be done. Type 2 compensator is selected to
give appropriate phase margin, gain margin and good dynamic response.
PCB design must done accordingly. PCB fabrication and components should be
mounted properly. Tests are conducted for universal input and different load condition
and results must validate against theoretical and simulation.
Chapter 2: This chapter deals with basics of Flyback converter, Different types of
conduction mode and its comparison especially about quasi resonant mode and
explanation about UCC28600IC and way it operates.
Chapter 4: This chapter explains requirements for a closed loop to be stable and
detailed design analysis closed loop system for SMPS using TL431 and optocoupler.
Chapter 5: This chapter gives how the PCB made using Altium, hardware
development and detailed analysis of the results obtained.
Chapter 6: This chapter gives the future scope of the project and summaries the
objectives achieved as conclusion.
CHAPTER 2
FLYBACK TOPOLOGY
This chapter includes fundamental theory of flyback topology, how it works and
comparison of discontinuous conduction mode, continuous conduction mode and
detailed explanation of quasi resonant mode. It also gives explanation about
UCC28600IC, pin details of UCC28600 and its operation based on line and load
condition.
Fig. 2.2 shows working of simple flyback topology. There are three stages in Flyback
converter operation. In the first stage MOSFET is switched on and the primary current
starts rising it raises to maximum value and energy is stored in this period between air-
gap of Ferrite core transformer. In this stage energy supplied on output is only by
output capacitor. Once the current reaches its peak value MOSFET switched off. In
the second stage energy transfer occurs. Once the MOSFET switched off, dotted end
become more negative compared to un dotted end. So on the secondary side diode be
forward biased and leakage inductance oppose this change, voltage overshoot occur at
the drain side of the MOSFET and it cause the ringing with MOSFET parasitic
capacitance. When all the energy transfers to the secondary side, in the primary side
parasitic component of MOSFET and magnetizing inductance forms a LC circuit
and start to resonate. So the next switching can be any time. It depends upon the mode
of the energy transfer[3].
Energy transfer can be happen in two ways. First one is Discontinuous conduction
mode (DCM) where all the energy transfers to the secondary side. Second one is
Continuous Conduction Mode (CCM) where part of the energy still remains in the air
gap when MOSFET again switched on[2]. These two have their own advantage and
disadvantage; it is tabulated in Table 2.1.
Fig. 2.3 shows primary goes to zero then secondary current starts rising. So complete
energy transferred to the secondary.
Fig. 2.4 shows secondary starts rising when primary current is not zero. Energy is still
left in the transformer.
2.4 UCC28600
In order to do quasi resonant switching controller must detect valley, UCC28600 is the
IC which detects the valley and suitable for quasi resonant mode. Fig. 2.6 shows the
UCC28600 top view. UCC28600 works in green mode, frequency foldback mode
based on load condition. It also has overvoltage protection, over temperature detection,
under voltage lockout and power limit feature. It has low start up current which is
25μA. It is a PWM controller whose pulse width depends on feedback voltage[14].
UCC28600 controller has different operating modes based on line and load condition.
It modulates both frequency and peak primary current. Fig. 2.7 shows operation of
UCC28600. At heavy loads from 100% to 30% controller have less switching
frequency so that there is more time for demagnetizing and it also reduces switching
loss. As the load decreases the switching frequency increase because less energy to
deliver. But it causes problem at light load because frequency is very high. So in order
to avoid this controller clamps frequency at 130KHz. When load is between 30% to
10% controller run frequency fold back mode. In which it modulate the frequency by
keeping the current constant. At very light loads controller clamps the frequency to
40KHz and run in Green mode or Burst mode to save the energy. In burst mode
packets or burst of 40KHz runs the MOSFET[14].
Fig. 2.7 Mode of UCC28600 under different line and load condition
These line and load condition are determined by voltage at feedback pin. This
feedback obtained from optocoupler. It provides isolation to the circuit. Fig. 2.8 shows
different operating mode based on voltage on the feedback.
CHAPTER 3
SYSTEM DESIGNING
This chapter deals with system designing and component selection for the circuit
given. It also includes capacitor value calculation, diode and MOSFET rating
calculation, snubber calculation and required component values for UCC28600. It
explains transformer design completely, the parameters necessary for a design, the
way it is constructed and transformer modelling using Bode 100 and simulation of
Transformer using Pexprt.
3.1 Methodology
Fig. 3.1 shows block diagram of Switched mode power supply using Flyback
converter. It has fullbridge rectifier, transformer, UCC28600, closed loop and output
filters. Fig. 3.2 shows actual circuit diagram of SMPS.
3.3 Specifications
In order to design a flyback converter specification of input and output are necessary.
Table 3.1 gives input and output specification. Any system can’t be 100% efficient but
based on literature survey flyback give 70% to 80% efficiency. In this project aim is to
achieve 85% efficiency. At the output ripple free is difficult to achieve. A reasonable
ripple needs to be there. Input and output is based on the application. Input frequency
is based on region of operation. In India grid frequency is 50Hz. In this project input is
selected as universal input design is based on minimum voltage which is considered as
worst case.
In order to design 20 Watt SMPS input current must be known. This can be calculated
by calculating the input power. If output power is 20W then input power is given by
equation 3.1
Pout
Pin (3.1)
Input power is 23.529W. Then input current is given by equation 3.2
Pin
Iavg (3.2)
Vdcmin
Iavg = 0.260A
Based on the duty cycle peak current is decided. So in order find Dmax reflected
voltage is needed. Reflected voltage is the voltage reflected on the primary when
secondary is conducting. Reflected voltage also called as Flyback voltage. Reflected
voltage value also decides stress on MOSFET and secondary side. For example
choosing the higher value of there is higher stress on MOSFET. Choosing the lower
value there is more stress on secondary. Normally in order to reduce secondary side
stress high value is chosen. It depends on the output rating. Flyback voltage or
reflected is assumed as 95V.
Vreflected = 95V
Vmin = 90V
Vreflected
DMax (3.3)
(Vreflected (Vmin Vds ))
Dmax = 0.507
Iavg
Ipeak (2 ) (3.4)
D
Ipeak = 1.02564A
D
Iprirms Ipripeak
3
(3.5)
Iprirms = 0.421A
Full bridge rectifier diode must withstand 0.421A. So peak inverse voltage for
fullbridge rectifier is equal to maximum input voltage which is 265V. For input
capacitor calculation ripple voltage value is needed. 20% to 30% ripple is allowed.
Normally input capacitor is electrolytic. Capacitor selection is difficult for less ripple.
Fig. 3.3 shows output waveform of fullbridge rectifier[4].
1 V
Tmin = sin 1 ( dcmin ) (3.6)
(2 f ) Vdcpeak
1 V
sin 1 ( dcpeak ) (3.7)
(2 f ) Vdcpeak
1 V 1 V
Tc ( sin 1 ( dcpeak )) ( sin 1 ( dcmin )) (3.8)
(2 f ) Vdcpeak (2 f ) Vdcpeak
Tc Td 10mS (3.9)
(2 Pin Td )
C (3.10)
(V dcpeak V2dcmin )
2
By substituting desired value of ripple, capacitance value can be obtained. Table 3.2
MOSFET must withstand primary rms current and it must have low gate threshold
voltage. When MOSFET is in switched off condition the voltage it must withstand is
given below. Fig. 3.4 shows voltage across MOSFET in off condition[9].
Vdrain Vmax Vreflected Vleakage Vspike = 375 + 95+ 230 that is 700V.
Rdson = 5Ω.
Loss =1.2Watt
PFETSwitching =1.3015mW.
When MOSFET switch off, complete energy can’t be transferred to secondary because
of leakage inductance. Energy stored in leakage inductance needs a path. If snubber
circuit is not there, MOSFET output capacitance gets charged and destroys the
MOSFET. So the proper snubber design very important. Fig. 3.5 shows waveform of
snubber circuit. In order to design snubber leakage inductance value which is taken
from next chapter. Value of leakage inductance obtained is 4μH. Power in leakage
inductance must be completely dissipated in snubber circuit[7].
Vsn 2
Rsn = (3.13)
1 Vsn
(( L I2 ) (Fsw ) ( ))
2 Vsn (nVout )
Selection of Vsn is critical. Lower the value more slow commutation process. Higher
the value faster the commutation but it may degrade cross regulation. Generally two to
three times the reflected voltage value is acceptable. Hence Vsn = 250V.
Rsn = 119KΩ
Vsn
Csn (3.14)
(Vsn Fsw R)
Csn = 4.7nF
V 2sn
Psn (3.15)
R sn
Psn = 0.33W
In order to know the value of primary inductance we must decide turns ratio and
switching frequency. Turn ratio requires little foresight on secondary side. In order to
reduce conduction loss in secondary diode must be chosen carefully. Turns ratio given
by equation 3.16
NP (VIN VDS ) D
(3.16)
NS (VO Vfw ) (1 D)
NP
for 30V output is 3.15
NS
NP
for 50V output is 1.89
NS
TON = 6.186μS.
Vdcmin Dmax
Lprimax
IPri Fsw
(3.19)
Lprimax = 570μH.
UCC28600 has overvoltage protection, power limit, current sense, soft start features.
Fig. 3.6 shows component for UCC28600. Every input pin has its own electrical
specification based on that resistance value must be calculated. UCC28600 has under
voltage lockout, below 8V it won’t start. It checks all the line and load condition once
everything is perfect and at VDD pin 13V available, it charges the soft charging
capacitor and it checks the voltage at feedback pin based on that mode of the
controller is decided.
In the beginning current flowing from Rsu charge the CVDD in the next cycle
transformer auxiliary winding supply power to the VDD pin. Auxillary diode must have
less reverse recovery time in order to cope up with the switching. UCC28600 gets the
signal for thermal shutdown in high temperature. UCC28600 is sensitive to Rovp, RPl
and Rcs values[14]. In order to calculate the resistances values we need to know the
primary to bias turns ratio which is given by equation 3.20.
Vout
Npb Nps ( ) (3.20)
Vbias
Npb = 6.25
VBulk
R ovp1 (3.21)
(Npb Iovpline )
Iovpline = 450 µA
Rovp1 = 133.33KΩ
Vovp
R ovp2 R ovp1 (3.22)
N
(( ps (Voutshut Vf )) Vovpload )
Npb
Vovpload = 3.75 V
Rovp2 = 36.39KΩ
1 1 Vbulk min
Ics(1) 0.5 (550mV ( ) )
R ovp1 R ovp2 Npb R ovp1
(3.23)
Ics(1) = 64.8195uA
1 1 Vbulk max
Ics(2) 0.5 (550mV ( ) ) (3.24)
R ovp1 R ovp2 Npb R ovp1
Ics(2) = 414.01uA
Vpl = 1.20V
Vcs(os) = 0.40V
Rcs = 0.875Ω
Rpl = 2.25KΩ
Soft charging capacitance value can be found out once the soft charging time is found
out.
(Cout V 2out )
t ss min
(2 Plim )
(3.27)
tssmin = 3.419μS
tssmin = 47.230nS
t ssmin
Css Iss [ ] (3.29)
Acs(FB) (Vpl Vcs(os) )
Vbulk(min)
R su (3.30)
Istartup
Istartup = 25μA
Rsu = 4.7MΩ
Nb V f Ll (CD Csnub )
R vdd ( ) ( ds1(os) QR (max) ) (3.31)
4 Np IDD (CISS Vout(hi) fQR (max)
VOUT(Hi) is V(OH) of the OUT pin, either 13 V (typ) VOUT clamp or less as measured.
RVDD=48.32Ω
TBurst
Cvdd (IDD (CISS Vout(hi) fQR(max) ) (3.32)
VDD(burst)
CVDD = 1.432μF.
Tss
Cvdd (IDD (CISS Vout(hi) fQR(max) ) (3.33)
VDD(UVLO)
CVDD = 7.58μF.
First set of calculation are for 30V and 0.5A. It includes calculation secondary current,
diode rating calculation and capacitor rating calculation.
NP
Isecpeak Ipripeak (3.34)
Ns
Isecpeak = 3.214A
Diode must withstand Peak inverse voltage of 151V which is given by equation 3.35.
Ns
PIV Output Vdcmax (3.35)
Np
2 Iout Ipeak
Isecrms (3.36)
3
IOUT = 0.5A.
Isecrms = 1.039A.
Value of capacitance
Voltage rating of capacitor
Equivalent series resistance (ESR)
dv
Iout C (3.37)
dt
Cout = 60.77μF.
Iripple = 0.910A
dV
ESR must be less than which is 329mΩ.
Iripple
At the secondary side, presence of leakage inductance cause voltage spike. Proper
design must be done in order to reduce voltage spike. Calculation of snubber resistor
and capacitor are shown below. Secondaary side leakage inductance given by the
equation 3.39.
Ll1
Ll2 (3.40)
NPs 2
Ll2 = 0.41μH
1
Fr (3.41)
2 Ll Cp
Fr = 63.078MHz
R Z X L 2 XC 2 (3.42)
R = 60Ω
1
C= (3.43)
(2 Fr R)
C = 88.41nF
Ll2 I2secrms
Power loss = (3.45)
2
= 0.22Watt
Isecpeak = 1.944A
IOUT = 0.1A.
Isecrms = 0.360A.
Cout = 21.85μF.
Iripple = 0.34A
Snubber calculation:
Ll2 = 1.08μH
Cp =100pF
Fr = 38.29MHz
R = 84Ω
C = 180nF
Ll2 I2secrms
Power loss = (3.46)
2
= 0.070308Watt
It also has emitter follower circuit in the secondary side. Zener clamps the voltage at
50V and wattage rating of the zener is 3Watt. And emitter follower circuit regulates
the output voltage 50V. Calculations are shown below.
Wzener
Izener (3.47)
Vzener
Izener = 0.066A
Vout Vzener
R (3.48)
Iz
R = 282Ω.
This section includes selection of core and core material, calculation of wire gauge of
primary, secondary and bias based on current density, skin effect and proximity effect.
Calculation of core loss and copper loss. Measurement of the parasitic element of the
transformer by bode 100 and precision LCR meter, simulation of transformer using
Pexprt and comparison of theoretical, practical and simulated values.
Ferrite core are generally used for SMPS design. Ferrite are black, brittle, hard and
chemical inert. There are two types of ferrite soft ferrite and hard ferrite. Soft
ferrites(which have low coercivity) are used in SMPS. General composition of ferrite
are MnZn and NiZn. NiZn has high resistivity suitable for application over 1MHz.
MnZn has higher permeability and suitable for application below 1MHz. In this
project N87(manufacturer EPCOS) which has MnZn as base material is selected. Core
shape also play a important role. Core and bobbin should be chose based on system
requirement such as physical height, weight, number of outputs and cost. Table 3.3
gives idea about how to choose core shape. In this project E core has taken because of
its low cost and tight coupling requirement[25].
4
Pout
A p A w Ae ( ) 3 cm4 (3.49)
0.014 B Fsw
Ap = 0.05856cm4
Ke = 0.261 10-4
Energy2
Kg (3.51)
(K e )
Where α is regulation.
Kg = 0.06850 cm5.
Even though these are rough estimate. But it gives better picture how to select the core
size. Based on above calculation E25/13/7 (Manufacturer EPCOS) is selected.
Magnetics characteristics of E25/13/7 are listed below. Gapped core selected for
energy storage.
Weight = 16g
L
AL = Inductance factor =
N2
(3.52)
= 250nH
Once the core is selected selection of wire plays an important role. Skin effect and
proximity effect plays a major role. Skin effect can be reduced by selecting the proper
wire size and proximity can mitigated if place the wire uniformly over the bobbin.
Wire selection must also consider the current it carries. Calculations are shown below.
2 E 104
J (3.53)
(Bm Ap Ku )
J = 700
Once the current density is known we can calculate the area of the wire. Current
flowing in primary already known from the previous calculation.
I
J (3.54)
A
A = 6.0428 10-4cm2
D2
A (3.55)
4
D = 0.0277cm
6.62
Sd cm (3.56)
f
Sd = 0.0234cm
L
AL (3.57)
N2
Npri = 48to get the proper turns ratio Npri become 50.
Current density on the secondary must be same. Turns ratio is already known. By
using these constraints we calculate the secondary number of turns and radius of the
secondary wire.
A = 1.484 10-3cm2
D = 0.0277cm = 0.277mm
Nsec = 16
A = 5.14 10-4cm2
D = 0.0255cm = 0.255mm
Nsec = 26
A = 2.14 10-5cm2
D = 0.00529cm = 0.0529mm
Nsec = 8
Based on the Standard wire gauge Table 3.4 selection of proper wire gauge is made. It
plays as important role in determining the losses[6].
Now we need to cross check whether theses turns can be accommodate in window
area of core. We need to calculate window utilization factor so that how much window
area copper wire is actually utilizing. Window utilization factor (WUF) is
multiplication of four factor.
Ku S1 S2 S3 S4 (3.58)
conductor area
Where S1 = 0.8
wire area
wound area
S2 = 0.78
usable window area
Ku = 0.33
Area = 50mm2
Every transformer has losses which is divided into two part one is copper loss another
is core loss. Copper loss again divided into two type one is DC losses and AC losses.
Calculation limited only for core loss and DC losses. AC losses are difficult to find.
Even though AC losses are much more than DC losses[6].
Wire gauge is already known. By using equation 3.60 we can calculate the resistance
of the wire.
R p MLT Np ( ) 106 cm (3.60)
cm
Where MLT is mean length turn which is obtained from bobbin geometry which is
equal to 3cm.
RP = 0.415Ω
RS MLT NS ( ) 106 cm (3.61)
cm
Loss I2 R (3.62)
Field in the airgap is not be uniform. It bends at the edges. It is called fringing effect.
Fig. 3.8 depicts fringing effect very well.
lgap 2 W
Ff 1 (( ) (ln( )) (3.63)
Ae lgap
Ff = 1.158
IPeakpri
(0.4 Np Ff ( ) 104
B 2 (3.64)
MPL
(lgap ( ))
B = 2.37T
Watt
4.855 105 f 1.62 B2.62 (3.65)
Kg
Milliwatt
= 40.835
Gram
mW
Coreloss ( ) Weight core 103 (3.66)
Gram
Powerloss
Watt Density (3.67)
Surfacearea
Watt
WattDensity = 0.0110 (3.68)
mm2
C
Trise = 10.8 (3.70)
Watt
In order to calculate transformer parasitic element Bode 100 is used. Bode 100 is a
USB controlled vector network analyzer. It produces frrequencies of different range
from 1Hz to 50MHz with different gain values form -30dBm to 13dBm. It has one
output and three input. Based on the requiremnt frequency must be set and gain by
using the Bode 100 analyzer suite. Transformer frequency analysis is done by varying
the frequencies from 10Hz to 1MHz by setting the proper gain value. Values are
calculated at desired frequency. For example DC resistance measured at low frequency
but leakage inductance and interwinding capacitance measured at 80KHz. Fig. 3.17
and 3.18 shows front and rear view of Bode 100.
Below are figures of measured resistance and inductance values. In the Fig.3.19,
Fig. 3.20, Fig.3.21 resistance value started increse as the frequency increse because of
skin effect and proximity effect. Fig. 3.22 and Fig.3.23 shows primary inductance and
leakage inductance respectively. Fig. 3.24 and Fig.3.25 sows inter winding
capacitance measured by precision LCR meter. And simulation of the transformer
done using PExprt. Power Electronics Expert(PExprt) is an interactive, PC-based
design tool that uses analytical expression to design magnetic components such as
transformer and inductors.
Fig. 3.20 shows measurement of secondary resintance with output 30V whose value is
0.199Ω.
Fig. 3.21 shows measurement of secondary resintance with output 50V whose value is
0.509Ω.
Fig. 3.24 and Fig. 3.25 shows experimental setup for measurement of interwinding
capacitance and value of interwinding capacitance is 49.43pF.
Fig. 3.26 shows simulation result of primary winding resistance whose value is 0.4Ω.
Fig. 3.27 shows simulation result of leakage inductance whose value is 2.30μH.
Fig. 3.28 shows simulation of interwinding capacitance and self capacitance whose
values are 50pF and 3pF respectively.
CHAPTER 4
This chapter explains closed loop stability of the power supply. It gives the detailed
description about TL431, optocoupler, compensator design, how to get overall transfer
function of the system. At the end it also bode plots of the transfer function.
4.1 TL431
TL431 three terminal adjustable shunt regulator which VREF as 2.5V. It has good
thermal stability. Output voltage can be set between 2.5V to 36V. In some application
TL431 works beter than zener. Fig. 4.1 gives the pin detail. Fig. 4.2 shows how
internal structure of TL431.In the diagram inverting pin connected to internal
reference which is 2.5 V and non-inverting pin connected to output reference.
Whenver reference voltage increases output voltage decreases because it is connected
base of the transistor so its works like a opamp with negative feedback[24].
TL431 need compensation to give desired response. Type 2 give good transient
response. VOUT is compared with reference voltage and this goes to error amplifier.
Error amplifier needed to give proper negative feedback. In this work
optocouplar(VO615A) used to give proper feedback. Fig. 4.3 and Fig. 4.4 shows
connection of type 2 compensator[10].
In this work UCC28600 IC is used and it operates in DCM mode. Small signal model
is used in this work to obtain trasfe function of the whole system. It consists of three
part.
Vcomp (s) 5 R cs
(4.1)
Is (s) D
1
(R 01 ) RL
Vo (s) sCout 2
(4.2)
is (s) R (R 1 )
L 01
sCout 2
Open loop transfer function can be obtained by above two equations. Equation 4.3
gives open loop transfer function
1
(R 01 ) RL
Vo (s) Vo (s) is (s) sCout 2 D
Vcomp (s) is (s) V(s) R (R 1 ) 5 R cs (4.3)
L 01
sCout 2
By substituting the values obtained from calculation we get below transfer function.
Above transfer function has zero at 38Hz and compensator must cancel it.
In order to get values of C2, C1, R2 calculation of RLED is important. RLED plays
important role. If RLED value is very high TL431 can’t work properly and also reduces
signal dynamic feature.
R≤ 14.85KΩ
30 R lower
2.5 (4.8)
(R1 R lower )
R1= 33.3KΩ
From bode plot, in order to have crossover frequency of 3KHz, we need 18dB gain.
(Gmid R1 R LED )
R2 (4.9)
(R pullup CTR)
R2 = 87.37KΩ
1
C1 (4.10)
(2 Fp1 R 2 )
1
C2 (4.11)
(2 Fz R 2 )
1
C3 (4.12)
(2 Fp2 R pullup )
Zero frequency is compensate the open loop. One pole frequency determines the
crossover frequency. Other pole frequency for attenuate high frequency noise. Below
are the chosen values of zero and pole.
Fz= 38Hz
Fp1= 2KHz
Fp2= 40KHz
C1= 1nF
C2= 47nF
C3= 198pF
Fig. 4.5 gives the bode plot of filter circuit whose zero must be cancelled by
compensator transfer function.
Fig. 4.6 shows compensator transfer function which shows high cross over frequency
which must be redued and phase margin must be increased.
Fig. 4.7 shows overall transfer function which has phase margin of 88.1 degree and
cross over frequency of 2.23KHz. Gain margin is infinity so closed loop system is
stable.
CHAPTER 5
HARDWARE IMPLEMENTATION
This chapter explains PCB designing, construction of the hardware, simulation results
using TINA-TI. It also has waveform of snubber, rectifier output, reflected voltage,
voltage across all pin of UCC28600 and output voltage. Thus, this chapter covers
information about the performances of integrated system, cost and comparison
between the proposed prototype and commercially available one.
PCB(Printed circuit board) design done using Altium software. Altium Designer is
a PCB and electronic design automation software package for printed circuit boards.
In this work double layer is constructed. Fig. 5.3 and 5.4 shows PCB top and bottom
layer respectively. There are few consideration to be made before designing the PCB.
And in order to separate primary and secondary side there must be small creepage
distance. By considering all the above information PCB is designed. Before designing
the PCB all the information of the components must be known. Using Altium software
schematic of the circuit must be drawn. Once the schematic is done updating of the
PCB done using the option. All the components must be placed on the board according
to the creepage, clearance and based on system requirements. Creepage is the shortest
distance along the surface of a insulating material between two conductive parts.
Clearance is the shortest distance in air between two conducting parts. Once all the
components are placed routing must be done. Once all the components are routed
3dimensional PCB can be seen by pressing 3. In order to fabricate PCB gerber file
must be generated. Fig. 5.1 shows the schematic of the circuit. Fig. 5.2 shows PCB
update from the schematic[11].
TINA- TI is free software by Texas instrument to design and simulate analog circuits.
Flyback converter is simulated using TINA-TI results are shown below. Fig. 5.5
shows circuit diagram of SMPS.
Fig. 5.6 shows simulation results shows pulses at out pin, current sense pin, feedback
pin and overvoltage protection pin for 85VAC input. Soft start saturates at 6V. Output
increases till desired output voltage. Drain pin have voltage of input and reflected
voltage. VM2 shows voltage at bulk capacitor.
Supply(85VAC to 265VAC)
Switched Mode Power Supply(SMPS)
Digital storage oscilloscope
Multimeter
Multimeter probes
Oscilloscope Probes
Load
Multimeter
Load
Multimeter Probes
Multimeter
Multimeter Probes
SMPS
Oscilloscope Probes
Supply
5.4 Results
Results include all the waveform, efficiency at every load and input condition.
The waveform at drain and primary side snubber is shown in Fig. 5.8. At drain when
MOSFET is in off condition voltage must be input plus reflected voltage.
Fig.5.9 shows 16V at IC’s supply pin. Minimum supply needed for IC is 8V
Fig.
5.9 Waveform at supply pin of the IC
Table shows 5.1 shows efficiency at various loads, input voltages and ripple in each
situation. Table 5.2 shows comparison between theoretical and practical value and
table.
Fig. 5.12 shows how efficiency varies with various condition. Efficiency is difficult
increase beyond 93% so based on the application tade off must be done.
Efficiency curves
99
96
93
Efficiency
90 88
87 86
84 83
81
78
75
Input 85Vac Input 160Vac Input 240Vac
Input Voltage
Fig. 5.3 shows expenditure of the project to build 10 similar SMPS. So in mass
production cost comes down to below 100Rs.
CHAPTER 6
The proposed prototype is competitive in both performance and cost. However, there
is still scope for improvisation. This chapter concludes this project and also discusses
about areas which can be improvised further.
6.1 Conclusion
Every power supply need to have high efficiency, long life and good performance.
Switched mode power supply is the heart of any electric meter. In this project
universal input is taken and it is shown that it can work satisfactorily in any condition.
Every flyback converter has transformer which contributes more losses. In order to
reduce losses sandwiched winding is done to reduce leakage inductance. Selection of
proper wire gauges based on skin and proximity effect, in order to reduce the
transformer losses. MOSFET switching losses reduced by using the quasi resonant
mode operation. Selection of proper value of diode, resistor and capacitor in order to
increase the efficiency. In this all the above mentioned points are implanted in order to
increase the efficiency.
To get better dynamic response type 2 compensator is used. Ripple is reduced. PCB
design is done based on the consideration of parasitic and to reduce unwanted noise.
For all condition from light load to full load tight regulation is achieved by closed loop
system and emitter follower configuration. In order to protect circuit from surges
Metal Oxide Varistor(MOV) is connected parallel to the input. At the input side to
limit inrush current two negative temperature coefficient(NTC) thermistor are applied.
These above techniques increases the efficiency, achieve tight load regulation, less
ripple and gives stable response.
The successful working of the proposed prototype has an efficiency of about 85%, is
cost effective and competitive to its commercial counterparts and sustainable. But it
still needs improvement.
1. Adding PFC circuit to the existing circuit in order to improve the power
quality.
2. Reducing the standby power of SMPS to increase the efficiency at no load.
3. On the secondary side implementing synchronous rectifier efficiency can be
increased further.
4. Four layer PCB design for reducing the emission and noise.
5. Implementing CCM, peak current reduces and efficiency can be increased.
6. Development of primary side sensing in order to reduce BoM.
Course Outcomes
REFERENCES
[3].Jean Picard, “Under the Hood of Flyback SMPS Designs”, 2010-2011 Texas
Instruments Power Supply Design Seminar 2010-11, Texas, Topic 1 TI Literature
Number: SLUP3303.
[4].T-Y Ho M-S chen, C-Hsien Lin D &, A C-W chang "The design of a flyback
converter based on simulation" IEEE on Power Electronics 2011.
[7].Ray Ridley, “Snubber Design”, Switching Power supply journal, Part XII, 2005.
[8].M. Milanovic J. Korelic A. Hren F. Mihalic P. Slibar "The RC-RCD clamp circuit
for fly-back converter" in Proceedings of the IEEE International Symposium on
Industrial Electronics 2005 Vol. 2 pp. 547- 552.
[10].Dan Mitchell and Bob Mammano, “Designing Stable Control Loops,” 2010-2011
Texas Instruments Power Supply Design Seminar 2010-11, Texas, Topic 4 ,TI
Literature No. SLUP173.
[15].ST “High voltage power MOSFET”, STB9NK90Z datasheet, May 2010, Doc ID
9479 Rev 7.
[19].TDK “NTC thermistors for inrush current limiting” B57237S0509M0, Oct. 2013.
[25]. TDK “Ferrites and accessories” E 25/13/7 (EF 25) core and accessories,
Series/Type: B66317, B66208, May 2017.
APPENDIX
APPENDIX 1
MATLAB CODE
Rcs = 0.875;
D = 0.507;
n = 3.12;
RL = 60;
C = 440e-6;
Resr = 329e-3;
R2 = 87370;
C2 = 47e-9;
R1 = 33000;
C1 = 1500e-12;
Rpullup =20000;
C3 = 198e-12;
Copto = 10e-12;
Rled = 1000;
CTR =.3;
s = tf('s');
M =(n*D)/(5*Rcs);
A = (((M)*RL*(Resr+(1/(s*C))))/(RL+Resr+(1/(s*C))));
bode(A)
margin(A)
hold on
B=((s*R1*C2)*((s*R2*C1)+1))*(1+(s*Rpullup*(C3+Copto)))*Rled;
F = (((s*R2*C2)+1)*Rpullup*CTR);
bode(F/B)
margin(F/B)
hold on
H =(A*F)/B;
bode(H)
hold on
margin(H)
2 %
SIMILARIT Y INDEX
1%
INT ERNET SOURCES
1%
PUBLICAT IONS
2%
ST UDENT PAPERS
PRIMARY SOURCES
1
Submitted to The Robert Gordon University
St udent Paper <1%
2
Submitted to University of Nottingham
St udent Paper <1%
3
Submitted to Indian Institute of Science,
Bangalore
<1%
St udent Paper
4
Submitted to CSU, Long Beach
St udent Paper <1%
5
U. Suprabha Padiyar, Vedavyasa Kamath.
"Design and implementation of a universal
<1%
input flyback converter", 2016 International
Conference on Electrical, Electronics, and
Optimization Techniques (ICEEOT), 2016
Publicat ion
6
Submitted to University of East London
St udent Paper <1%
7
en.wikipedia.org
Int ernet Source <1%
8
orbilu.uni.lu
Int ernet Source <1%
9
www.arroweurope.com
Int ernet Source <1%
10
Submitted to University Tun Hussein Onn
Malaysia
<1%
St udent Paper
11
Ali M. Eltamaly. "Performance of MPPT
Techniques of Photovoltaic Systems Under
<1%
Normal and Partial Shading Conditions",
Elsevier BV, 2018
Publicat ion
12
digital.library.unt.edu
Int ernet Source <1%
13
orca.cf.ac.uk
Int ernet Source <1%
14
D.D.C. Lu, D.K.W. Cheng, Y.S. Lee. "A single-
switch power-factor-corrected converter with
<1%
reduced repeated power processing", 4th IEEE
International Conference on Power Electronics
and Drive Systems. IEEE PEDS 2001 -
Indonesia. Proceedings (Cat. No.01TH8594),
2001
Publicat ion
Exclude quotes Of f Exclude matches Of f
Exclude bibliography Of f