Unit IV Notes
Unit IV Notes
As in Fig.1 ,The microprocessor has arithmetic and logic unit (ALU),
Instructiondecoder and control unit, Instruction register, Program counter (PC),
clock circuit (internal or external), reset circuit (internal or external) and
registers. But the microprocessor has no on chip I/O Ports, Timers, Memory etc.
Intel 8085 is an 8-bit microprocessor and Intel 8086/8088 a 16-bit
microprocessor.
MICROCONTROLLER :
1
Fig.2.Block Diagram of a Microcontroller
For example, Intel 8051 is 8-bit microcontroller and Intel 8096 is 16-bit
microcontroller. The block diagram of Microcontroller is shown in Fig.2.
COMMERCIAL MICROCONTROLLERS
3
The 8051 microcontroller is a very popular 8-bit microcontroller introduced by
Intel in the year 1981 and it has become almost the academic standard now a days. The
8051 is based on an 8-bit CISC core with Harvard architecture. Its 8-bit architecture is
optimized for control applications with extensive Boolean processing. It is available as
a 40-pin DIP chip and works at +5 Volts DC. The salient features of 8051 controller are
given below.
8-bit ALU,
one 8-bit PSW(Program Status Register),
A and B registers ,
one 16-bit Program counter ,
one 16-bit Data pointer register(DPTR),
128 bytes of RAM and 4kB of ROM and 4 parallel I/O ports each of 8-bit
width.
ALU :8051 has 8-bit ALU which can perform all the 8-bit arithmetic and logical
operations in one machine cycle. The ALU is associated with two registers A & B
A and B Registers :
4
The A and B registers are special function registers which hold the results of
manyarithmetic and logical operations of 8051.
The A register is also called the Accumulator and as it’s name suggests, is used as a
general register to accumulate the results of a large number of instructions. By default it
is used for all mathematical operations and also data transfer operations between CPU
and any external memory.
The B register is mainly used for multiplication and division operations along with A
register.
It has no other function other than as a location where data may be stored.
5
6
The Register bank and R registers:
There are 4 register banks and each register bank contains set of eight registers that are named R0,
R1, etc. up to R7.
The selection of register bank depends on PSW register bits RS0 and RS1.
These R0-R7 registers are used as auxiliary registers in many operations.
The "R" registers are also used to temporarily store values.
Program Counter(PC) :
8051 has a 16-bit program counter .
PC always points to the address of the next instruction to be executed. After execution of one
instruction the program counter is incremented to point to the address of the next instruction to be
executed. It is the contents of the PC that are placed on the address bus to find and fetch the desired
instruction.
Since the PC is 16-bit width ,8051 can access program addresses from 0000H to FFFFH , a total of
6kB of code.
The stack is a part of RAM used by the CPU to store information temporarily. This information may
be either data or an address.
The CPU needs this storage area as there are only limited numbers of registers.
The register used to access the stack is called the Stack pointer which is an 8-bit register. So ,it can
take values of 00 to FF H.
When the 8051 is powered up ,the SP register contains the value 07.i.e the RAM location value 08 is
the first location being used for the stack by the 8051 controller.
There are two important instructions to handle stack are PUSH and POP.
The loading of data from CPU registers to the stack is done by PUSH and the loading of the contents of
the stack back into a CPU register is done by POP.
In 8051 the RAM locations 08 to 1F (24 bytes) can be used for the Stack.
In any program if we need more than 24 bytes of stack, we can change the SP point to RAM locations
30-7F H. This can be done with the instruction MOV SP,# XX.
7
DPTR. This DPTR can also be used as two 8-registers DPH and
DPL.
AC, Parity-P and Overflow-OV .These flag bits indicate some conditions that resulted after an
instruction was executed.
The bits PSW3 and PSW4 are denoted as RS0 and RS1 and these bits are used the select the bank
registers of the RAM location.
The meaning of various bits of PSW register is shown below.
8
9
SPECIAL FUNCTION REGISTERS (SFRs) :
SFR registers exist in the address range of 80h through FFh. Each SFR has an address (80h through FFh)
and a name. The following Table 4.2.1 provides a the 8051's SFRs, their names and their address. Although
the address range of 80H through FFH offers 128 possible addresses, there are only 21 SFRs in a standard
8051
6 P0* Port 0 80
P1* Port 1 90
8 P2* Port 2 0A
9 P3* Port 3 0B
10 IP* Interrupt Priority control 0B8
11 IE* Interrupt Enable control 0A8
12 TMOD Timer mode register 89
13 TCON Timer control register 88
*
14 TH0 Timer 0 Higher byte 8C
15 TL0 Timer 0 Lower byte 8A
16 TH1 Timer 1Higher byte 8D
17 TL1 Timer 1 lower byte 8B
18 SCON Serial control register 98
*
19 SBUF Serial buffer register 99
20 PCON Power control register 87
The * indicates the bit addressable SFRs . Table:SFRs of 8051
10
The 21 Special Function Registers of 8051 Microcontroller are categorized in to seven groups. They are:
∙ Pointer Registers: DPTR (Data Pointer - DPL, DPH) and SP (Stack Pointer)
∙ I/O Port Latches: P0 (Port 0), P1 (Port 1), P2 (Port 2) and P3 (Port3)
A OR ACCUMULATOR (ACC)
The Accumulator or Register A is the most important and most used 8051
Microcontroller SFRs. The Register A is located at the address E0H in the SFR memory space. The
Accumulator is used to hold the data for almost all the ALU Operations.
B (REGISTER B)
The B Register is used along with the ACC in Multiplication and Division operations. These
11
two operations are performed on data that are stored only in Registers A and B. During Multiplication
Operation, one of the operand (multiplier or multiplicand) is stored in B Register and also the higher byte
of the result.
In case of Division Operation, the B Register holds the divisor and also the remainder of the result. It can
also be used as a General Purpose Register for normal operations and is often used as an Auxiliary
Register by Programmers to store temporary results. Register B is located at the address F0H of the SFR
Address Space.
PROGRAM STATUS WORD (PSW)
The PSW or Program Status Word Register is also called as Flag Register and is one of the
important SFRs. The PSW Register consists of Flag Bits, which help the programmer in checking the
condition of the result and also make decisions
12
POINTER REGISTERS
The Data Pointer is a 16-bit Register and is physically the combination of DPL (Data Pointer Low)
and DPH (Data Pointer High) SFRs. The Data Pointer can be used as a single 16-bit register (as DPTR) or
two 8-bit registers (as DPL and DPH).
DPTR doesn’t have a physical Memory Address but the DPL (Lower Byte of DPTR) and
DPH (Higher Byte of DPTR) have separate addresses in the SFR Memory Space. DPL =
82H and DPH = 83H. The DPTR Register is used by the programmer addressing external memory
(Program - ROM or Data - RAM).
SP or Stack Pointer points out to the top of the Stack and it indicates the next data to be accessed. Stack
Pointer can be accessed using PUSH, POP, and CALL and RET Instructions. The Stack Pointer is an 8- bit
register and upon reset, the Stack Pointer is initialized with 07H.
I/O Port Registers (P0, P1, P2 and P3)
The 8051 Microcontroller four Ports which can be used as Input and/or Output. These four ports
are P0, P1, P2 and P3. Each Port has a corresponding register with same names (the Port Registers are also
P0, P1, P2 and P3. The addresses of the Port Registers are as follows: P0 - 80H, P1 - 90H, P2 - A0H and
P2 -B0H.
The PCON or Power Control register, as the name suggests is used to control the
8051 Microcontroller’s Power Modes and is located at 87H of the SFR Memory Space. Using two bits in
the PCON Register, the microcontroller can be set to Idle Mode or Power down Mode.
The Serial Control or SCON SFR is used to control the 8051 Microcontroller’s Serial Port. It is
located as an address of 98H. Using SCON, we can control the Operation Modes of the Serial Port, Baud
Rate of the Serial Port and Send or Receive Data using Serial Port.
Timer Control or TCON Register is used to start or stop the Timers of 8051
Microcontroller. It also contains bits to indicate if the Timers has overflowed. The TCON SFR also
consists of Interrupt related bits.
The TMOD or Timer Mode register or SFR is used to set the Operating Modes of the Timers T0
and T1. The lower four bits are used to configure Timer0 and the higher four bits are used to configure
Timer1.
IE (Interrupt Enable)
The IE or Interrupt Enable Register is used to enable or disable individual interrupts. If a bit is
SET, the corresponding interrupt is enabled and if the bit is cleared, the interrupt is disabled. The Bit7 of
the IE register i.e. EA bit is used to enable or disable all the interrupts
IP (Interrupt Priority)
The IP or Interrupt Priority Register is used to set the priority of the interrupt as High or Low. If a
bit is CLEARED, the corresponding interrupt is assigned low priority and if the bit is SET, the interrupt is
assigned high priority.
P0.0- P0.7(AD0-AD7) : The port 0 pins multiplexed with Address/data pins .If the microcontroller is
accessing external memory these pins will act as address/data pins otherwise they are used for Port 0 pins.
P1.0- P1.7 :These 8-pins are dedicated for Port1 to perform input or output port operations.
P2.0- P2.7(A8-A15) : The port2 pins are multiplexed with the higher order address pins
.When the microcontroller is accessing external memory these pins provide the higher order address byte
otherwise they act as Port 2 pins.
P3.0- P3.7 :These 8-pins are meant for Port3 operations and also for some control operations like
Read,Write,Timer0,Timer1 ,INT0,INT1 ,RxD and TxD.
Alternate Functions of Port
3:
XTAL1,XTAL2: These two pins are connected to Quartz crystal oscillator which runs the on-chip
oscillator. The quartz crystal oscillator is connected to the two pins along with a capacitor of 30pF as shown
in the circuit. If we use a source other than the crystal oscillator, it will be connected to XTAL1 and XTAL2
is left unconnected.
RST: The RESET pin is an input pin and it is an active high pin. When a high pulse is applied to this pin the
microcontroller will reset and terminate all activities. Upon reset all the registers except PC will reset to
0000 Value and PC register will reset to 0007 value.
(External Access): This pin is an active low pin. This pin is connected to ground when
microcontroller is accessing the program code stored in the external memory and connected to Vcc when it
is accessing the program code in the on chip memory. This pin should not be left unconnected.
(Program Store Enable) : This is an output pin which is active low. When the microcontroller is
accessing the program code stored in the external ROM ,this pin is connected to the OE (Output Enable) pin
of the ROM.
ALE (Address latch enable): This is an output pin, which is active high. When connected to external
memory , port 0 provides both address and data i.e address and data are multiplexed through port 0 .This
ALE pin will demultiplex the address and data bus .When the pin is High , the AD bus will act as address
bus otherwise the AD bus will act as Data bus.
Memory organization:
The 8051 microcontroller has 128 bytes of Internal RAM and 4kB of on chip ROM.
The RAM is also known as Data memory and the ROM is known as program memory.
CODE memory: The program memory is also known as Code memory .This Code
memory holds the actual 8051 program that is to be executed. In 8051 this memory is limited to
64K.
Code memory may be found on-chip, as ROM or EPROM. It may also be storedcompletely
off-chip in an external ROM or, more commonly, an external EPROM.
DATA memory:The 8051 has only 128 bytes of Internal RAM but it supports 64kBof external
RAM.
As the name suggests, external RAM is any random access memory which is off-chip. Since the
memory is off-chip it is not as flexible in terms of accessing, and is also slower.
Internal RAM is found on-chip on the 8051 .So it is the fastest RAM available, and it is also the most
flexible in terms of reading, writing, and modifying it’s contents.
Internal RAM is volatile, so when the 8051 is reset this memory is cleared.
The 128 bytes of internal RAM is organized as below.
(i) Four register banks (Bank0, Bank1, Bank2 and Bank3) each having 8 number
of 8 bit registers (total 32 bytes). The default bank register is Bank0. The remaining Banks are
selected with the help of RS0 and RS1 bits of PSW Register. (ii) 16 bytes of bit addressable area
and
(iii) 80 bytes of general purpose area (Scratch pad memory). This area is also utilized by the
microcontroller as a storage area for the operating stack.
The 8051 microcontroller has 4kB of on chip ROM but it can be extended up to 64kB. This ROM is
also called program memory or code memory.
The CODE segment is accessed using the program counter (PC) for opcode fetches and by DPTR for
data. The external ROM is accessed when the EA(active low) pin is connected to ground or the
contents of program counter exceeds 0FFFH.
When the Internal ROM address is exceeded the 8051 automatically fetches the code bytes from the
external program memory.
Each port of 8051 has bidirectional capability. Port 0 is called 'true bidirectional port' as it floats (tristate)
when configured as input. Port 1, 2, 3 are called 'quasi bidirectional port'.
Port-0 can be configured as a normal bidirectional I/O port or it can be used for address/data interfacing for
accessing external memory. When control is '1', the port is used for address/data interfacing. When the
control is '0', the port can be used as a normal bidirectional I/O port. Let us assume that control is '0'. When
the port is used as an input
port, '1' is written to the latch. In this situation, both the output MOSFETs are 'off'. Hence the output pin
floats. This high impedance pin can be pulled up or low by an external source. When the port is used as an
output port, a '1' written to the latch again turns 'off' both the output MOSFETs and causes the output pin to
float. An external pull-up is required to output a '1'. But when '0' is written to the latch, the pin is pulled
down by the lower MOSFET. Hence the output becomes zero.
When the control is '1', address/data bus controls the output driver MOSFETs. If the address/data bus
(internal) is '0', the upper MOSFET is 'off' and the lower MOSFET is 'on'. The output becomes '0'. If the
address/data bus is '1', the upper transistor is 'on' and the lower transistor is 'off'. Hence the output is '1'.
Hence for normal address/data interfacing (for external memory access) no pull-up resistors are required.
Port-1 has 8 pins (P1.1-P1.7). The structure of a port-1 pin is shown in Figure. Port-1 does not have any
alternate function i.e. it is dedicated solely for I/O interfacing. When used as output port, the pin is pulled up
or down through internal pull-up. To use port-1 as input port, '1' has to be written to the latch. In this input
mode when '1' is written to the pin by the external device then it read fine. But when '0' is written to the pin
by the external device then the external source must sink current due to internal pull-up. If the external
device is not able to sink the current the pin voltage may rise, leading to a possible wrong reading.
Port-3 has 8 pin (P3.0-P3.7). Port-3 pins have alternate functions. The structure of a port-3 pin is shown in
Figure. Each pin of Port-3 can be individually programmed for I/O operation or for alternate function. The
alternate function can be activated only if the corresponding latch has been written to '1'. To use the port as
input port, '1' should be written to the latch. This port also has internal pull-up and limited current driving
capability
INSTRUCTION SET
ADDRESSING MODES OF 8051 : The way in which the data operands are accessed by different
instructions is known as the addressing modes. There are various methods of denoting the data operands in
the instruction.
Immediate addressing mode : The addressing mode in which the data operand is a constant and it is a part
of the instruction itself is known as Immediate addressing mode. Normally the data must be preceded by a #
sign. This addressing mode can be used to transfer the data into any of the registers including DPTR.
Ex: MOV A , # 27 H : The data (constant) 27 is moved to the accumulator register ADD R1 ,#45 H
: Add the constant 45 to the contents of the accumulator
MOV DPTR ,# 8245H :Move the data 8245 into the data pointer register. MOV P1,#21
H
Direct addressing mode: The addressing mode in which the data operand is in the RAM location (00 -7FH)
and the address of the data operand is given in the instruction is known as Direct addressing mode. The
direct addressing mode uses the lower 128 bytes of Internal RAM and the SFRs
MOV R1, 42H : Move the contents of RAM location 42 into R1 register MOV 49H,A : Move
the contents of the accumulator into the RAM location 49. ADD A, 56H : Add the contents of
the RAM location 56 to the accumulator
Register addressing mode :The addressing mode in which the data operand to be manipulated lies in one of
the registers is known as register addressing mode.
MOV A,R0 : Move the contents of the register R0 to the accumulator ADD A,R6
:Add the contents of R6 register to the accumulator
MOV P1, R2 : Move the contents of the R2 register into port 1
MOV R5, R2 : This is invalid .The data transfer between the registers is not allowed.
Register Indirect addressing mode : The addressing mode in which a register is used as a pointer to the
data memory block is known as Register indirect addressing mode.
MOV A,@ R0 :Move the contents of RAM location whose address is in R0 into A (accumulator)
MOV @ R1 , B : Move the contents of B into RAM location whose address is held by R1 When R0 and
R1 are used as pointers, they must be preceded by @ sign
One of the advantages of register indirect addressing mode is that it makes accessing the data more
dynamic than static as in the case of direct addressing mode.
Indexed addressing mode : This addressing mode is used in accessing the data elements of lookup table
entries located in program ROM space of 8051.
The 16-bit register DPTR and register A are used to form the address of the data element stored in on-chip
ROM. Here C denotes code .In this instruction the contents of A are added to the 16-bit DPTR register to
form the 16-bit address of the data operand.
4.4 INSTRUCTION SET
8051 Microcontroller have set of instruction to perform different operations. There are five group of
instruction which are listed below.
∙ Arithmetic Instructions
∙ Logic Instructions
∙ Branch Instructions
∙ Bit-oriented Instructions
1.ARITHMETIC INSTRUCTION:
Arithmetic instructions perform several basic operations such as addition, subtraction, division,
multiplication etc. After execution, the result is stored in the first operand.
[Source: Mohamed Ali Mazidi, Janice Gillispie Mazidi, Rolin McKinlay, “The 8051Microcontroller
and
Description:
Instruction adds the register Rn (R0-R7) to the accumulator. After addition, the result is stored in
the accumulator
Before execution: A=2Eh
R4=12h
After execution:
A=40h R4=12h
2. ADD A,@Ri -
Ri: Register R0 or R1
Description:
Instruction adds the indirect RAM to the accumulator. Address of indirect RAM is stored in the Ri
register (R0 or R1). After addition, the result is stored in the accumulator. Register address:
R0=4Fh
Before execution:
After execution :
A= 49h
3. ADDA,#DATA
Description:
Instruction adds data (0-255) to the accumulator. After addition, the result is stored in the
accumulator.
ADD A,#33h
Before execution:
A= 16h
After execution:
A= 49h )
4. SUBB A,direct-
Description:
Instruction subtracts the direct byte from the accumulator with a borrow. If the higher bit is
subtracted from the lower bit then the carry flag is set. As it is direct addressing, the direct byte can be any
SFRs or general-purpose register with address 0-
7Fh. (0-127 dec.). The result is stored in the accumulator.
SUBB A,Rx
Before execution:
After execution:
A=76h, C=0
Description:
This instruction increments the value in the accumulator by 1. If the accumulator includes the
number 255, the result of the operation will be 0.
Before execution:
A=E4h
After execution:
A=E5h
Description: Instruction decrements the value in the accumulator by 1. If there is a 0 in the accumulator,
the result of the operation is FFh. (255 dec.)
Syntax: DEC A;
Before execution:
A=E4h
After execution:
A=E3h
Description:
Instruction divides the value in the accumulator by the value in the B register. After division the
integer part of result is stored in the accumulator while the register contains the remainder. In case of
dividing by 1, the flag OV is set and the result of division is unpredictable. The 8-bit quotient is stored in
the accumulator and the 8-bit remainder is stored in the B register.
Before execution:
P
A=FBh (251dec.) B=12h (18 dec.)
After execution:
13·18 + 17 =251
Description: Instruction adjusts the contents of the accumulator to correspond to a BCD number after two
BCD numbers have been added by the ADD and ADDC instructions. The result in form of two 4-digit
BCD numbers is stored in the accumulator.
Before execution:
Description: Instruction multiplies the value in the accumulator with the value in the B register. The
low-order byte of the 16-bit result is stored in the accumulator, while the high byte remains in the B
register. If the result is larger than 255, the overflow flag is set. The carry flag is not affected.
Before execution:
After execution:
Logic instructions perform logic operations upon corresponding bits of two registers. After execution, the
result is stored in the first operand.
[Source: “The 8051Microcontroller and Embedded Systems: Using Assembly and C” by Mohamed Ali
ANL A,Rn
Before execution:
Instruction performs logic OR operation between the accumulator and Rn register. The result is stored in
the accumulator.
Syntax: ORLA,Rn
Before execution:
XRL A,Rn - Exclusive OR register to accumulator Rn: any R register (R0-R7) Instruction performs
exclusive OR operation between the accumulator and the Rn register. The result is stored in the
accumulator.
Syntax:
XRL A,Rn
Before execution:
Instruction complements all the bits in the accumulator (1==>0, 0==>1). Syntax:
CPL A Before
execution:
A=(00110110) After
execution:
A=(11001001)
Eight bits in the accumulator are rotated one bit left, so that the bit 7 is rotated into the bit 0 position.
Syntax:
RL A Before
execution:
A= C2h (11000010 Bin.) After
execution:
A=85h (10000101 Bin.)
A: accumulator All eight bits in the accumulator are rotated one bit right so that the bit 0 is rotated into the
bit 7 position.
Syntax:
RR A
Before execution:
RLC A - Rotates the accumulator one bit left through the carry flag A: accumulator
All eight bits in the accumulator and carry flag are rotated one bit left. After this operation, the bit 7 is
rotated into the carry flag position and the carry flag is rotated into the bit 0 position.
Syntax:
RLC A Before
execution:
A= C2h(11000010 Bin.) C=0
After execution:
A= 85h(10000100Bin.) C=1
RRC A - Rotates the accumulator one bit right through the carry flag A: accumulator
All eight bits in the accumulator and carry flag are rotated one bit right. After this operation, the carry flag
is rotated into the bit 7 position and the bit 0 is rotated into the carry flag position.
Syntax:
RRC A
Before execution:
After execution:
A= 61h(01100001Bin.) C=0
A: accumulator
A nibble refers to a group of 4 bits within one register (bit0-bit3 and bit4-bit7). This instruction
interchanges high and low nibbles of the accumulator.
Syntax:
SWAPA
These instructions are used to copy the content of source operand to Destination operand
[Source: “The 8051Microcontroller and Embedded Systems: Using Assembly and C” by Mohamed Ali
The instruction moves the Rn register to the accumulator. The Rn register is not affected. Syntax
MOV A,Rn
Beforeexecution:
R3=58h
After execution: R3=58h
A=58h
Instruction moves the indirectly addressed register of RAM to the accumulator. The register address is
stored in the Ri register (R0 or R1). The result is stored in the accumulator. The register is not affected.
Syntax:
MOV A,@Ri
Before execution:
SUM=58h
After execution:
A=58h SUM=58h
After execution:
A=28h
Instruction moves the indirectly adressed register of RAM to the direct byte. The register is not affected.
Syntax:
MOV Rx,@Ri
SUM=58h TEMP=58h
MOVC A,@A+DPTR - Moves the code byte relative to the DPTR to the accumulator Instruction first
adds the 16-bit DPTR register to the accumulator. The result of addition is then used as a memory address
from which the 8-bit data is moved to the accumulator.
4. BIT-ORIENTED INSTRUCTIONS
Similar to logic instructions, bit-oriented instructions perform logic operations. The difference is that these
are performed upon single bits.
[Source: “The 8051Microcontroller and Embedded Systems: Using Assembly and C” by Mohamed Ali
Mazidi, Janice Gillispie Mazidi, Rolin McKinlay , pg.no.29]
ANL C,bit - AND direct bit to the carry flag C: Carry flag
Instruction performs logic AND operation between the direct bit and the carry flag. Syntax:
ANL C,bit
Before execution:
After execution:
C: Carry flag, Instruction clears the carry flag. After execution: C=0
Bit: any bit of RAM, Instruction clears the specified bit. Syntax:
CLR P0.3
Bit: any bit of RAM, Instruction complements the specified bit of RAM (0==>1, 1==>0). Syntax:
CPL P0.3
C: Carry flag, Instruction complements the carry flag (0==>1, 1==>0). Syntax:
CPL C
MOV bit,C - Moves the carry flag to the direct bit C: Carry flag, Bit: any bit ofRAM Instruction moves
the carry flag to the direct bit. After executing the instruction, the carry flag is not affected.
Syntax: MOVP1.2,C
After execution:
If C=0 P1.2=0 If C=1 P1.2=1
MOV C,bit - Moves the direct bit to the carryflag C: Carry flag, Bit: any bit of RAM Instruction moves
the direct bit to the carry flag. After executing the instruction, the bit is not affected.
Syntax:
MOV C, P1.4
After execution:
Instruction sets the specified bit. The register containing that bit must belong to the group of the so called
bit addressable registers.
Syntax: SETB
P0.1
Before execution:
After execution:
upon their execution a jump to a new location from where the program continues execution is
executed.
Conditional jump instructions:
a jump to a new program location is executed only if a specified condition is met. Otherwise, the
program normally proceeds with the next instruction.
[Source: “The 8051Microcontroller and Embedded Systems: Using Assembly and C” by Mohamed Ali