mcs51: fix destination RAM type in XCHD A, @R0/@R1 #14289
Merged
+1
−1
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I and @jyaif have found an issue in the mcs51's implementation of the
XCHD
("Exchange Digit") instruction: it reads the old value withIRAM_IR
but writes the new value withIRAM_W
.Instead, it should have written the new value symmetrically with

IRAM_IW
:We found the issue while investigating a bad Dynamical Redefinable Character Set (DRCS) rendering on the minitel2 (
src/mame/philips/minitel_2_rpic.cpp
).Before this patch:

After this patch:

(from MiniPavi service -> code
6212*DRCS
-> image 1)cc @jfdelnero