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Unit – 7
The 8051 Microcontroller
Topics Covered
1. Microcontroller Evolution
2. Intel 8051
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1. The Mocrocontroller Evolution
Microcontrollers were developed in the mid-1970s.
These were basically calculator-based processors with small ROM program memories, very limited RAM data
memories and a handful of input/output ports.
As silicon technology developed, more powerful, 8-bit microcontrollers were produced.
In addition to their improved instruction sets, these microcontrollers included on-chip counter/timers,
interrupt facilities, and improved I/O handling.
On-chip memory capacity was still small and was not adequate for many applications.
One of the most significant developments at this time was the availability of on-chip ultraviolet erasable EPROM
memory.
This simplified the product development time considerably and for the first time, also allowed the use of
microcontrollers in low-volume applications.
The 8051 family was introduced in the early 1980s by Intel.
Since its introduction, the 8051 has been one of the most popular microcontrollers
and has been second- sourced by many manufacturers.
The 8051 currently has many different versions and some types include on-chip
analogue-to-digital converters, a considerably large size of program and data
memories.
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2. Intel 8051
The Intel MCS-51 is commonly referred to as 8051.
It is a Harvard architecture, single chip microcontroller (µC) series which was
developed by Intel in 1980 for use in embedded systems.
The 8051 architecture provides many functions (like CPU, RAM, ROM, I/O, interrupt
logic, timer, etc.) in a single package.
Features of 8051
1. 8-bit ALU, Accumulator, 8-bit Registers and 8-bit data
bus; hence it is an 8-bit microcontroller
2. 16-bit program counter
3. 8-bit Processor Status Word(PSW)
4. 8-bit Stack Pointer
5. Internal RAM of128bytes
6. On chip ROM is4KB
7. Special Function Registers (SFRs) of 128bytes
8. 32 I/O pins arranged as four 8-bit ports (P0 -P3)
9. Two 16-bit timer/counters : T0 andT1
10.Two external and three internal vectored interrupts
11.Full duplex UART (serialport)
UART: Universal Asynchronous Receiver-Transmitter
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Block Diagram of 8051
128 Bytes of Internal RAM Structure
(LOWER ADDRESS SPACE)
The lower 32 bytes are divided into 4 separate
banks. Each register bank has 8 registers of one
byte each.
A register bank is selected depending upon two
bank select bits in the PSW register.
Next 16 bytes are bit addressable.
In total, 128bits (16X8) are available in addressable
area. Each bit can be accessed and modified by
suitable instructions.
The bit addresses are from 00H (LSB of the first
byte in 20H) to 2FH (MSB of the last byte in 2FH).
Remaining 80 bytes of RAM (30H TO 7FH) are
available for general purpose.
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Internal Architecture of 8051 Microcontroller
The Various registers units of 8051 are described below:
Accumulator (ACC):
It is used as an operand register
It is implicit or specified in the instruction
Has an address in on chip SFR bank
Register B:
Used to store one of the operands for multiplication and division, otherwise, scratch pad
considered as a SFR.
Stack Pointer (SP):
8 bit wide register. Incremented before data is stored on to the stack using PUSH or CALL
instructions. Stack defined anywhere on the 128 byte RAM.
Data Pointer (DPTR):
16 bit register contains DPH and DPL Pointer to external RAM address. DPH and DPL are allotted
separate addresses in SFR bank.
Port 0 to 3 Latches and Drivers:
Each I/O port allotted a latch and a driver Latches allotted address in SFR. User can
communicate via these ports P0, P1, P2, and P3.
Serial Data Buffer:
The 8051 internally had TWO independent registers, TRANSMIT buffer (parallel in serial out –
PISO) and RECEIVE buffer (serial in parallel out –SIPO) identified by SBUF and allotted an
address in SFR.
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Program Status Word (PSW):
PSW is a set of flags containing status details of a program in execution.
CY : Carry flag
AC : Auxiliary carry flag
F0 : Available to the user for the general purpose
RS1 : Register Bank selector bit 1
RS0 : Register Bank selector bit 0
OV : Overflow flag
-- : User-definable bit
P : Parity flag
Timer Registers:
for Timer0 (16 bit register – TL0 & TH0) and for Timer1 (16 bit register – TL1 & TH1) four addresses
allotted in SFR .
Control Registers:
Control registers are IP, IE, TMOD, TCON, SCON, and PCON. These registers contain control and
status information for interrupts, timers/counters and serial port. Allotted separate address in
SFR.
Timing and Control Unit:
This unit derives necessary timing and control signals for internal circuit and external system
bus.
Oscillator:
Generates basic timing clock signal using crystal oscillator.
Instruction Register:
Decodes the opcode and gives information to timing and control unit.
EPROM and program address register:
These provide on chip EPROM and mechanism to address it. All versions don’t have EPROM.
RAM and RAM Address Register:
Provide internal 128 bytes RAM and a mechanism to address internally
ALU:
It performs 8 bit arithmetic and logical operations over the operands held by TEMP1 and TEMP
2.User cannot access temporary registers.
SFR Register Bank;
It is a set of special function registers address range: 80H to FFH. Interrupt, serial port and timer
units control and perform specific functions under the control of timing and control unit.
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Pin Configuration of 8051
The pin diagram of 8051 microcontroller is shown below.
Pins 1 to 8:
These pins are known as Port 1.
This port doesn’t serve any other functions.
It is internally pulled up, bi-directional I/O port.
Pin 9:
It is a RESET pin, which is used to reset the
microcontroller to its initial values.
Pins 10 to 17:
These pins are known as Port 3.
This port serves some alternate functions like
interrupts, timer input, control signals, serial
communication signals RxD and TxD, etc.
Pins 18 & 19:
These pins are used for interfacing an external crystal
to get the system clock.
Pin 20:
This pin provides the power supply to the circuit.
Pin Configuration of 8051 (Contd …)
Pins 21 to 28:
These pins are known as Port 2.
It serves as I/O port.
Higher order address bus signals are also multiplexed
using this port.
Pin 29:
This is PSEN pin which stands for Program Store
Enable.
It is used to read a signal from the external program
memory.
Pin 30:
This is EA pin which stands for External Access input.
It is used to enable/disable the external memory
interfacing
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Pin Configuration of 8051 (Contd …)
Pin 31:
This is Address Latch Enable (ALE) pin.
It is used to demultiplex the address-data signal of
port.
Pins 32 to 39:
These pins are known as Port 0.
It serves as I/O port.
Lower order address and data bus signals are
multiplexed using this port.
Pin 40:
This pin is used to provide power supply to the circuit.
