1 2 3 4 5 6 7 8

Battery connector Regulator Interface LEDs Hardware revision id

Fit 2x MAX40203 for D57/D67 provide secondary
lower Vf or fit 2x BAT60A reverse current protection in
for better ESD protection. case of D59/D69 failure.

COD59
D59 BAT60A COD57 BAT60A
D57 VCOMBINED powers the micro:bit through the regulator U3. It will be 5V if USB power
COTP17 NLVBAT0FILT
VBAT_FILT PID5702 VCOMBINED is connected, otherwise it will be up to 3V from battery, depending on battery charge.
TP17 PITP1701 PID5902 PID5901 PID5701

VREG
A VCOMBINED COD1 A
"3V DC" D1
LED_PWR
COD69
D69 COD67
D67 1 D1 ensures U3 Vout does not exceed abs max
JST PH style
1 3
PID101
of Vin+0.3V when micro:bit is powered from LED_USB
PIR301
connector PIJ201 PID103
PIR3802 PIR3902 COR3
2 2 edge connector or "lozenge" power pads. R3
for 3V PIJ202 PID690A1 PID690A2 PID670A1 PID670A2 PID102
not fitted
COR38 COR39 1k
battery, e.g. PIC1801 not fitted not fitted R38 R39
2x AA. PIJ20P PIJ20P1 not fitted
PID690B1

PID690B2
EN
GND
PID670B1

PID670B2
EN
GND PIR60 1
BAT54T-7-F 220R 220R PIR302 COR50
R50 4k7
BRD_REV_ID
COJ2
J2 PIC1802 COC18
C18 PIR3801 PIR3901 PIR5001 PIR5002

2
MAX40203 MAX40203 PID720 COR60
R60 NCP114BMX330TCG PID60 A D60
COD60 PID610A D61
COD61 PIC10
10R 4 1 NLVREG
VREG COC10
COD72 PIU304
IN OUT PIU301 C10
D72
PIR60 2 PIC102

GND
PAD
100nF KL27 can differentiate

2
If fitted C18 must BAT60A has very 3
EN
PID7302 TP9 & TP10 connect
be electrolytic to low Vf, important
PIU303

PITP901 COTP9
TP9 to "lozenge" shaped
PID60 K Red PID610K Yellow different hardware
PID7201 PIC3701 PIC3601 revisions based on
avoid potential when battery COU3
U3
PIU305 PIU302 COD73
D73

5
2
COC37
C37 COC36
C36 power pads for values of R3/C10/R50.
short circuit failure. powered. PITP1001 COTP10
TP10
PIC3702 1uF PIC3602 4.7uF external battery pack. GND GND
PID7301

1
USB connector COD51 BAT60J
D51
U3 input capacitor is C37; R60 reduces inrush
COR13
R13 0R COS2
S2 NLVCOMBINED to C37 as power is applied to limit overshoot.
COTP19 VCOMBINED
TP19 PITP1901 PIR1302 PIR1301
PIS201
PIS202 PID5102 PID5101

SHUNT

NLVBUS
VBUS
S2 is shorted by PITP1801

default but allows

PIC3501 PIC3 01 COTP18
TP18
B
USB power to be COC35
not fitted
C35 COC33
C33 BAT60J has very low reverse
Power monitoring Reset B
isolated for testing. PIC3502 PIC3 02 2.2nF leakage, preventing the
VBUS_ABSENT signal from being VBAT_FILT VBUS VREG

GND GND
affected by back-powering. 2
PIT102 COT1
T1
KL27 can enable
PIR610 PIR1501
4k7 COR61 COR15
battery voltage R61 R15
VREG VREG
presence/level 4k7 10k 47k
1 1
VBUS PIJ301
COD62 monitoring;
PIT101
PIR6102 PIR1502 PIR3701 PIR1901
2 D62
D- PIJ302

Micro USB
connector for
D+
ID
3
PIJ303
4
PIJ304
NLUSB0P
USB_P PID6204 PID6203 PITP701

COTP7
TP7
USB_ESD_P consumes 30uA.
DTA143ZET1G 3 PIT103 VBUS_ABSENT
COR37
R37
10k
COR19
R19
10k
"Reset/
power"
GND
5 PIR240
programming PIJ305 PID6205 PID6202

PIR3702 PIR1902
and power.
SHLD1
H1 PIJ30H1
NLUSB0N
USB_N PID6206 PID6201 PITP801
USB_ESD_N
3
PIT403 COT4
T4
COR24
R24
100k
COT3
T3
PIT30
3
Falling edge on IF_NRST SW_RESET
H2 RUN_VBAT_SENSEPIT401
1 1 VBUS_ABSENT
SHLD2 PIJ30H2 COR59 COTP8
TP8 PIR2401 PIT301
PIC1901 PISW101 PISW104
R59 100R PRTR5V0U2F_115 4k7 4k7 triggers auto
COJ3
J3 PIR5901 PIR5902
VBAT_SENSE wakeup on USB PIC3201 COC19
C19 COSW1
SW1
Place D62 ESD
4k7 PIR2701 4k7
insertion. This
COC32
C32 PIC1902 100nF
PIC3801 PIC3802
protection
GND COR27
R27
PIC520 signal is called
PIC320 100nF PISW102 PISW103
COC38 1nF
C38 close to J3. DTC143EET1G 2PIT402 10k PIC5201
COC52
C52
100nF DTC143EET1G 2 PIT302 WAKE_ON_EDGE
in DAPLink.
PIR270
SHEILD GND GND GND

C C
Interface MCU KL27
Used 68R for EMC, instead S1 is shorted by defaul but allows
debugging
VREG_KL27 VREG
of 33R from datasheet. VREG_KL27 to be isolated for testing.
COL5
L5
COS1
S1 NLVREG0KL27
VREG_KL27
COR42
R42 68R PIS101
PIS102
NLUSB0ESD0P
USB_ESD_P 1
PIL501 PIL502
2 NLUSB0ISO0P
USB_ISO_P PIR4201 PIR4202
NLUSB0RES0P
USB_RES_P COU5
U5 PIR5601 PIR2 02 SHUNT
COR43
R43 68R
3
PIU503
USB0_DP VDD
15
PIU5015 COR56
R56 COR22
R22
PIC3401 COC34
C34 PIC310 COC31
C31 PIC30 1 C30
COC30 PIC2901 COC29
C29 PIC20 1 COC20
C20
NLUSB0ESD0N
USB_ESD_N 4 3 NLUSB0ISO0N
USB_ISO_N NLUSB0RES0N
USB_RES_N 4 7 IF_SWDCLK
PIL504 PIL503 PIR4301 PIR4302 PIU504
USB0_DM VDDA PIU507
0R 10k PITP301
COTP3
TP3 SWD interface to KL27
PIC3402 100nF PIC3102 100nF PIC30 2 100nF PIC2902 100nF PIC20 2 10uF possible via PCB test
MCF12102H900-T NLLED0USB
LED_USB 20
PIU5020
PTB0/LLWU_P5 VREGIN
6
PIU506
PIR5602 PIR2 01 IF_SWDIO PITP401 COTP4
TP4 points. In production
NLVBAT0SENSE
VBAT_SENSE 21 5
PIU5021
PTB1 VOUT33 PIU505
TP2-4 are covered with
BOOTMODE PITP101
COTP1
POI2C0INT0SCL
I2C_INT_SCL 22 TP1 solder resist and KL27
POI2C0INT0SDA
PIU5022
PTC1/LLWU_P6/RTC_CLKIN Allow KL27 to interrupt nRF52. ROM USB bootloader is
I2C_INT_SDA 23 GND IF_NRST COTP2
NLRUN0VBAT0SENSE
PIU5023
PTC2 NLIF0SWDCLK
PITP201
TP2
RUN_VBAT_SENSE 24 10 IF_SWDCLK used for comissioning.
NLVBUS0ABSENT
PIU5024
PTC3/LLWU_P7 PTA0 PIU5010
VBUS_ABSENT 25 11 POI2C0INT0INT VREG
PIU5025
PTC4/LLWU_P8 PTA1 PIU5011
I2C_INT_INT
POSWDIO 26 12
SWDIO PIU5026
PTC5/LLWU_P9 PTA2 PIU5012
NLIF0SWDIO
POSWDCLK 27 13 IF_SWDIO COTP5
SWDCLK PIU5027
PTC6/LLWU_P10 PTA3 PIU5013
NLBOOTMODE
PITP501
TP5
28 14 BOOTMODE
PIU5028 PTC7 PTA4 PIU5014
17 POUART0INT0RX
NLSW0RESET
SW_RESET 29
PTA18 PIU5017
18
UART_INT_RX PITP601 COTP6
TP6
PIU5029
PTD4/LLWU_P14 PTA19 PIU5018 POUART0INT0TX
UART_INT_TX
30 19 Key: Silkscreen
NLBRD0REV0ID
PIU5030
PTD5 PTA20 PIU5019
NLIF0NRST
BRD_REV_ID 31 IF_NRST & layout
NLLED0PWR
PIU5031
PTD6/LLWU_P15 UART_INT_RX is serial data
LED_PWR 32 2 GND notes
PIU5032 PTD7 VSS1 PIU502
16 from KL27 to nRF52833.
D VSS2 PIU5016
D
1 8
PIU501
PTE0 VSSA PIU508
Block name
POKL270DAC 9 33 UART_INT_TX is serial data
KL27_DAC PIU509
PTE30 PAD PIU5033

from nRF52833 to KL27.

MKL27Z256VFM4
Design notes
GND

DESCRIPTION
Micro:bit Educational Foundation micro:bit V2 power supply and KL27 USB interface
SHEET FILENAME MicroBit_Sheet1.SchDoc PROJECT FILENAME MicroBit.PrjPcb LICENCE Attribution-ShareAlike 4.0 International (CC BY-SA 4.0) LAST MODIFIED 02/03/2021 PAGE 1 OF 3 DRAWN BY Steve REVISION V2.0.0_S

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

Speaker Microphone Buttons Touch sensing

VREG

RUN_MIC is nRF52 GPIO acting as

PIR5302
VREG COR53
controllable power supply for R53
microphone. Should be configured R62 and R63 DC 10M
A COR16
R16 120R PORUN0MIC
RUN_MIC bias mic output. A
PIR1601 PIR1602
for high drive current to power D70.
COR47
R47 0R
PIR5301
PID501 COR28
R28 105R
VREG POLOGO
LOGO PIR4702 PIR4701 1PILOGO101
PIC210 COD5
D5 COSP1
SP1 PIR2802 PIR2801
COC21
C21 BAS16LD MLT-8530 PIR6201 PIC5 01
COC55
C55 COLOGO1
R16/C21 PIC2102 10uF
PIU40 COU4
U4 COR62
R62
R47 and C55 support sensing not fitted LOGO1
PIC5 02 10pF

4
filter power PID502 1
PISP101
+
SPU0410LR5H-QB-7
33k
PIR401 PIR501 adjustment. Left as 0R/DNF
for speaker. 4 PIR5801 COC54
C54 the logo behaves just like the
- COR4 COR5 LOGO1 is touch-sensitve

GND VDD
PISP104
GND 1 PIR620 R4 R5
COR58
R58 PIC2801 OUT PIU401 PIC5401 PIC5402 POMIC0IN
MIC_IN 10k 10k touch-sensitive RING pins. gold micro:bit logo.
68R COC28
C28
PIT20D COT2 PISP103 PISP102 PIC2802 1uF PIR402 PIR502

GND
GND
GND
D
100nF
COR54
R54 0R
PIR5802 POBTN0A
BTN_A POBTN0B
BTN_B
POKL270DAC
KL27_DAC PIR5402 PIR5401 COC23
C23 100nF
T2 PID70 A PIR6302
G BSS816NW COD70
D70
PIU402 PIU403 PIU405 PIU406 COR63
R63 PISW203 PISW202 PISW304 PISW301

3
PIC2301 PIC2302 PIT20G

5
6
PIR1702
POSPEAKER
SPEAKER PIR5502 PIR5501
PIT20S Red
1k
VREG

S
Backlight COSW2
SW2 COSW3
SW3
COR55
R55 4k7 COR17
R17
100k
PID70 K PIR6301 PISW204 PISW201 PISW30 PISW302
Both nRF52 and KL27 may drive speaker. RING pins on
In normal operation KL27_DAC is high
PIR1701 expansion
PIR901 PIR801 PIR702
impedance and nRF52 controls speaker. connector are COR9
R9 COR8
R8 COR7
R7
R54/55 limit current flow between MCUs GND touch-sensitive. 10M 10M 10M
should they drive simultaneously.
D70 always lights
PIR902 PIR802 PIR701
when mic powered. RING0
RING1
RING2

B B

Motion sensor LED matrix Expansion connector

U1 & U6 are alternatives, fit
VREG_MOTION VREG_MOTION COL1-5 are usually nRF52 outputs that are used to sink current to selectively
one depending on availability.
illuminate LEDs. Note that for light sensing the LEDs must be reverse-biased. COL1, 3 VREG
I2C address (7 bit): 0x1F & 5 are connectoed to nRF52 ADC-capable pins but light sensing is currently digital.

1
PID710
COU1 POCOL5
COL5 COD71
U1
FXOS8700CQR1TR D71 40
PIJ1040
GND
POI2C0INT0SCL 4 14 POCOL4
I2C_INT_SCL PIU104
SCL/SCLK VDD PIU1014 COL4
POI2C0INT0SDA 6
I2C_INT_SDA PIU106
SDA/MOSI PID7102 36
7 1 POCOL3
PIJ1036
GND
PIU107
SA0/MISO VDDIO PIU101 COL3

2
10
PIU1010
SA1/nCS
15 POCOL2 35
NC PIU1015 COL2 PIJ1035
GND External I2C signals bidirectional
9 POI2C0EXT0SDA 34
PIU109
INT2 I2C_EXT_SDA PIJ1034
P20 since controller role may be
RSV_GND
RSV_GND

11 8 33
I2C_INT_INT PIU1011
INT1 not fitted CRST PIU108 POCOL1
COL1 POI2C0EXT0SCL
I2C_EXT_SCL PIJ1033
P19 reversed, or signals used for GPIO.
32
PIR4502 PIR4602 PIR1 02 PIR4802 PIR4902
PIJ1032
3V
16 2 VREG
GND
GND

PIU1016
RST BYP PIU102

VREG
S3 is shorted by default, but allows
PIC1201 PIC1301 COR45
R45 COR46
R46 COR11
R11 COR48
R48 COR49
R49 28
PIJ1028
3V Edge connector 3V may be input or
VREG_MOTION to be isolated for testing. 105R 105R 105R 105R 105R
PIU105 PIU102 PIU103 PIU103 not fitted COC12
C12 not fitted COC13
C13 output.
3
5

13
12

COS3
PIC120 100nF PIC1302 100nF PIR4501 PIR4601 PIR1 01 PIR4801 PIR4901 27 PIJ1027
3V
C S3 NLVREG0MOTION
VREG_MOTION 26 C
PIS301
PIS302
POROW1
ROW1 POGPIO3
GPIO3 PIJ1026
P16
SHUNT POSPI0EXT0MOSI 25
PIC1401 PIC1601 PIC1501 PID20A PID40A PID60A PID80A PID100A
SPI_EXT_MOSI PIJ1025
P15 SPI signals are bidirectional since
POSPI0EXT0MISO 24
COC14
C14 COC16
C16 COC15
C15 SPI_EXT_MISO PIJ1024
P14 main and secondary roles may be
POSPI0EXT0SCK 23
PIC1402 100nF PIC1602 100nF PIC1502 4.7uF COD2
D2
PID20K
COD4
D4
PID40K
COD6
D6
PID60K
COD8
D8
PID80K
COD10
D10
PID100K
SPI_EXT_SCK PIJ1023
P13 reversed, or signals used for GPIO.
GND GND
POROW2
ROW2 PORING2 19
PID120A PID140A PID160A PID180A PID200A
RING2 PIJ1019
P2

VREG_MOTION POGPIO4 18 GPIO4 reserved for accessibility.

COD12
D12
PID120K
COD14
D14
PID140K
COD16
D16
PID160K
COD18
D18
PID180K
COD20
D20
PID200K
GPIO4 PIJ1018
P12
GND 17
BTN_B PIJ1017
P11
POROW3 COLR5 16
ROW3 PIJ1016
P10
POI2C0INT0INT
I2C_INT_INT
PIU609 PIU601 PID220A PID240A PID260A PID280A PID300A POGPIO2
GPIO2
15
PIJ1015
14
P9 GPIO1/GPIO2 support NFC.
10

POGPIO1
GPIO1 P8
9

PIJ1014
COU6
U6 PID2 0K PID240K PID260K PID280K PID300K
2 COD22
D22 COD24
D24 COD26
D26 COD28
D28 COD30
D30
I2C addresses (7 bit): BTN_A and BTN_B may be used as
VDD
VDD_IO

PIU602
CS_XL PORING1 10
3 POROW4 RING1 PIJ1010
P1 outputs (indicating when a button
PIU603
CS_MAG accelerometer: 0x19 ROW4
magnetometer: 0x1E PID320A PID340A PID360A PID380A PID400A is pressed) or inputs (to replicate
1 COLR2 9 button functionality off-micro:bit).
I2C_INT_SCL PIU601
SCL/SPC PIJ109
P7
4 COLR4 8 They should not be used as GPIOs.
I2C_INT_SDA PIU604
SDA/SDI/SDO COD32 PID320K
COD34 PID340K
COD36 PID360K
COD38 PID380K
COD40 PID400K PIJ108
P6
3
PIT503 COT5
T5
3
PIT703 COT7
T7
NLINT10XL
INT1_XL 12
PIU6012
INT1_XL
5
C1 PIU605 POROW5
ROW5
D32 D34 D36 D38 D40
BTN_A
COLR1
7
PIJ107
6
PIJ106
P5
P4
PIT701
1 NLINT10MAG
INT1_MAG 7
PIU607 INT_MAG/DRDY PID420A PID440A PID460A PID480A PID500A
1 NLUNUSED0INT20XL
UNUSED_INT2_XL 11
PIT501 4k7 PIU6011
INT2_XL PIC2502 PIC2601 PORING0 2
RING0 PIJ102
P0
GND
GND

4k7 4k7 ROW1-5 are usually COD42 PID420K

COD44 PID440K
COD46 PID460K
COD48 PID480K
COD50 PID500K
COC25
C25 COC26
C26 D42 D44 D46 D48 D50 Key: Silkscreen
outputs that source
4k7 PIC2501 100nF PIC2602 100nF
COLR1

COLR2

COLR3

COLR4

COLR5
current for LEDs. COLR3 1 & layout
PIJ101
P3
PIT702 LSM303AGRTR
PIU60 PIU608 They are also used NLCOLR1 NLCOLR2 NLCOLR3 NLCOLR4 NLCOLR5 COJ1 notes
6
8

J1
D 2PIT502 DTC143EET1G
2 DTC143EET1G
U6 interrupt outputs
as digital inputs
when light sensing.
D
Block name
are not open drain.

GND GND GND GND Design notes

DESCRIPTION
Micro:bit Educational Foundation micro:bit V2 input and output peripherals
SHEET FILENAME MicroBit_Sheet2.SchDoc PROJECT FILENAME MicroBit.PrjPcb LICENCE Attribution-ShareAlike 4.0 International (CC BY-SA 4.0) LAST MODIFIED 02/03/2021 PAGE 2 OF 3 DRAWN BY Steve REVISION V2.0.0_S

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

A A

Target MCU
VREG

PIC5602 PIC5702 PIC5902 PIC601 PIC170 PIC801

COC56
C56 COC57
C57 COC59
C59 COC6
C6 COC17
C17 COC8
C8
PIC5601 100pF PIC5701 100pF PIC5901 100pF PIC602 4.7uF PIC1702 100nF PIC802 100nF

VREG
COANT1
ANT1
50 Ohm 50 Ohm 50 Ohm COU2
U2
i COL7 i COL3 i A22 D2 POSPEAKER
L7 NLRF L3 PIU20A22
VDD P0.00/XL1 PIU20D2
SPEAKER
2 1 RFPIL302 1 B1 F2 POSPI0EXT0MISO
IN PIANT102PIL702 PIL701 PIL301 PIU20B1
VDD P0.01/XL2 PIU20F2
SPI_EXT_MISO
1 4.7nH 4.7nH W1 A12 PORING0
GND PIANT101 PIU20W1
VDD P0.02/AIN0 PIU20A12
RING0
PIC2701 PIC1 01 Y2
PIU20Y2
VDDH P0.03/AIN1
B13
PIU20B13 PORING1
RING1
not fitted COC27
C27 COC11
C11 AD23 J1
PIU20AD23
VDD P0.04/AIN2 PIU20J1 PORING2
RING2
B PIC2702 0.8pF PIC1 02 0.3pF AD14
PIU20AD14
VDD P0.05/AIN3
K2
PIU20K2
MIC_IN B
L1 POUART0INT0RX
P0.06 PIU20L1
UART_INT_RX
AD2 M2 VREG
PIU20AD2
VBUS P0.07/TRACECLK PIU20M2

COTP20
N1 TP20
P0.08 PIU20N1 PITP2001
AD4 L24 POGPIO2
PIU20AD4
D- P0.09/NFC1 PIU20L24
GPIO2 PIR5201 PIR510
AD6 J24 POGPIO1 U2 acts as controller for
PIU20AD6
D+ P0.10/NFC2 PIU20J24
GPIO1
T2 POCOL2 COR52 COR51 "internal" I2C_INT bus.
P0.11/TRACEDATA2 PIU20T2
COL2 R52 R51
H23 U1 POGPIO4 R51 & R52 are strong
PIU20H23
ANT P0.12/TRACEDATA1 PIU20U1
GPIO4 1k 1k
AD8 POSPI0EXT0MOSI (1k) pull-ups for speed.
COTP11 P0.13 PIU20AD8
SPI_EXT_MOSI PIR520 PIR5102
POSWDCLK TP11 PIU20AA24
AA24 AC9 POBTN0A
SWDCLK PITP1101
COTP12 SWDCLK P0.14 PIU20AC9
BTN_A
POSWDIO TP12 AC24 AD10 POROW3 POI2C0INT0SCL
SWDIO PITP1201 PIU20AC24
SWDIO P0.15 PIU20AD10
COTP21 ROW3 I2C_INT_SCL
AC11 TP21 POI2C0INT0SDA
P0.16 PIU20AC11 PITP2101
I2C_INT_SDA
AD12 POSPI0EXT0SCK
COX1 P0.17 PIU20AD12
SPI_EXT_SCK
X1 32MHz B24 AC13
PIU20B24
XC1 P0.18/nRESET PIU20AC13
1 3 A23 A14 POROW5
PIX101 PIX103 PIU20A23
XC2 P0.19 PIU20A14
ROW5
AD16 PORUN0MIC
PIC701 PIX102 PIX104 PIC401 P0.20 PIU20AD16
RUN_MIC
Four U2 N.C. pins POBTN0B A18 AC17
COC7
C7 COC4
C4 BTN_B PIU20A18
N.C. P0.21 PIU20AC17
ROW1
B19 AD18 POROW2 On-board sensors and KL27 may assert I2C
PIC702 24pF PIC402 24pF are connected to PIU20B19
N.C. P0.22 PIU20AD18
ROW2
POMIC0IN AB2 B17 interrupt line. U2 must provide internal pull-up.
active signals to MIC_IN PIU20AB2
N.C. P0.23 PIU20B17
BTN_B
AC21 AD20 POROW4
ease PCB trace ROW1 PIU20AC21
N.C. P0.24 PIU20AD20
ROW4
POROW1 AC19 A20 POI2C0INT0INT
routing under ROW1 PIU20AC19
N.C. P0.25 PIU20A20
I2C_INT_INT
AC15 G1
the IC.
PIU20AC15
N.C. P0.26 PIU20G1
PIC201
T23 H2 VREG
PIU20T23
N.C. P0.27 PIU20H2
COC2
C2
V23 B11 POCOL1
PIU20V23
N.C. P0.28/AIN4 PIU20B11
COL1
P0.29/AIN5
A10
PIU20A10
PIC20 24pF
PIL201
B3
PIU20B3
DCC P0.30/AIN4
B9
PIU20B9 POCOL5
COL5
PIR102 PIR20
Board is not COL2
L2 A8 POCOL3
P0.31/AIN7 PIU20A8
COL3 COR1
R1 COR2
R2
10µH C1
C designed for PIU20C1
DEC1 4k7 4k7 C
PIL202 D23 AD22
DC-DC to be PIU20D23
DEC3 P1.00/TRACEDATA0 PIU20AD22

B5
PIU20B5
DEC4 P1.01
Y23
PIU20Y23
PIR10 PIR201
enabled but N24 W24
L2 is fitted to
PIU20N24
DEC5 P1.02 PIU20W24 POGPIO3
GPIO3 POI2C0EXT0SCL
I2C_EXT_SCL
E24 B15 POI2C0EXT0SDA
allow recovery
PIU20E24
DEC6 P1.03 PIU20B15
I2C_EXT_SDA
AC5 U24 POLOGO
PIU20AC5
DECUSB P1.04 PIU20U24
LOGO
in case it is A16 POCOL4
P1.05 PIU20A16
COL4 U2 acts as controller for "external" I2C_EXT
turned on R24
P1.06 PIU20R24
bus, although pins may alternatively be
erroneously B7 P23
PIC10 PIC501 PIC901 PIC40 1 PIC5801 PIU20B7
VSS P1.07 PIU20P23
used as GPIOs. R1 & R2 are 4k7 for
by firmware. F23 P2 POUART0INT0TX
COC1
C1 COC5
C5 COC9
C9 COC40
C40 COC58
C58
PIU20F23
VSS_PA P1.08 PIU20P2
UART_INT_TX compatibility with micro:bit V1.
EPAD R1
PIC102 1uF PIC502 100nF PIC902 100pF PIC40 2 10nF PIC5802 100pF
PIU20EPAD
EPAD P1.09/TRACEDATA3 PIU20R1

nRF52833-QIAA Most U2 GPIOs are bidirectional

because firmware could
theoretically re-purpose them.

Key: Silkscreen
& layout
notes
D D
Block name

Design notes

DESCRIPTION
Micro:bit Educational Foundation micro:bit V2 nRF52 target MCU
SHEET FILENAME MicroBit_Sheet3.SchDoc PROJECT FILENAME MicroBit.PrjPcb LICENCE Attribution-ShareAlike 4.0 International (CC BY-SA 4.0) LAST MODIFIED 02/03/2021 PAGE 3 OF 3 DRAWN BY Steve REVISION V2.0.0_S

1 2 3 4 5 6 7 8