4311 Fa
4311 Fa
FEATURES DESCRIPTION
■ Improves I2C Bus Rise Time Transition The LTC®4311 is a dual I2C active pull-up designed to
■ Ensures Data Integrity with Multiple Devices on the enhance data transmission speed and reliability for bus
I2C Bus. loading conditions well beyond the 400pF I2C specification
■ Wide Supply Voltage Range: 1.6V to 5.5V limit. The LTC4311 operates at supply voltages from 1.6V
■ Improves Low State Noise Margin to 5.5V and is also compatible with SMBus.
■ Up to 400kHz Operation
The LTC4311 allows multiple device connections or a lon-
■ Auto Detect Low Power Standby Mode
ger, more capacitive interconnect, without compromising
■ Low (<5μA) Supply Current Shutdown
slew rates or bus performance, by using two slew limited
■ Does Not Load Bus When Disabled or Powered Down
pull-up currents.
■ Strong Slew Limited Pull-up Current
■ ±8kV Human Body Model ESD Ruggedness During positive bus transitions, the LTC4311 provides slew
■ 2mm × 2mm DFN and SC70 Packages limited pull-up currents to quickly slew the I2C or SMBus
lines to the bus pull-up voltage. During negative transitions
or steady DC levels, the currents are disabled to improve
APPLICATIONS negative slew rate, and improve low state noise margins.
■ Notebook and Palmtop Computers An auto detect standby mode reduces supply current if
■ Portable Instruments both SCL and SDA are high. When disabled, the LTC4311
■ Battery Chargers goes into low (<5μA) current shutdown.
■ Industrial Controls The LTC4311 is available in the 2mm × 2mm × 0.75mm
■ TV/Video Products DFN, and SC70 packages.
■ ACPI SMBus Interface , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All
other trademarks are the property of their respective owners. Protected by U.S. Patents
including 6356140 and 6650174.
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LTC4311
ABSOLUTE MAXIMUM RATINGS (Notes 1, 2)
VCC to GND .................................................... – 0.3 to 6V Storage Temperature Range (DFN) ........– 65°C to 125°C
BUS1, BUS2, ENABLE Inputs ......................... – 0.3 to 6V Storage Temperature Range (SC70).......– 65°C to 125°C
Operating Temperature Lead Temperature (Soldering 10, sec)
LTC4311C ................................................ 0°C to 70°C SC70 ............................................................ 300°C
LTC4311I..............................................– 40°C to 85°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
ENABLE 1 6 GND
VCC 1 6 BUS1
NC 2 7 5 BUS2
GND 2 5 GND
VCC 3 4 BUS1 ENABLE 3 4 BUS2
SC70 PACKAGE
DFN PACKAGE
6-LEAD PLASTIC SC70
6-LEAD (2mm s 2mm) PLASTIC DFN
TJMAX = 125°C, θJA = 102°C/W TJMAX = 125°C, θJA = 150° C/W
EXPOSED PAD (PIN 7) PCB CONNECTION TO GND IS OPTIONAL (Note 3)
ORDER INFORMATION
Lead Free Finish
TAPE AND REEL (MINI) TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC4311CDC#TRMPBF LTC4311CDC#TRPBF LCNG 6-Lead (2mm × 2mm) Plastic DFN 0°C to 70°C
LTC4311IDC#TRMPBF LTC4311IDC#TRPBF LCNG 6-Lead (2mm × 2mm) Plastic DFN –40°C to 85°C
LTC4311CSC6#TRMPBF LTC4311CSC6#TRPBF LCNF 6-Lead (2mm × 2mm) Plastic SC70 0°C to 70°C
LTC4311ISC6#TRMPBF LTC4311ISC6#TRPBF LCNF 6-Lead (2mm × 2mm) Plastic SC70 –40°C to 85°C
TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
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LTC4311
ELECTRICAL
• CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V, unless otherwise noted.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 4: The rise time of an I2C bus line is calculated from VIL(MAX) to
may cause permanent damage to the device. Exposure to any Absolute VIH(MIN) or 0.9V to 2.1V (with VCC = 3V). This parameter is guaranteed by
Maximum Rating condition for extended periods may affect device design and not tested. With a minimum boosted pull-up current of 2.5mA:
reliability and lifetime. Rise Time = (2.1V – 0.9V) • 400pF/2.5mA = 0.19μs.
Note 2: All currents into pins are positive. All voltages are referenced to Note 5: Determined by design, not tested in production.
GND unless otherwise specified.
Note 3: Thermal characteristics are determined with exposed pad soldered
to GND plane. If the exposed pad is left open, thermal characteristics can
be drastically different.
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LTC4311
TYPICAL PERFORMANCE CHARACTERISTICS (TA = 25°C, unless otherwise indicated)
50
20 30
VCC = 3.3V VCC = 3.3V
15
20
10 VCC = 2.5V VCC = 2.5V
10
5
VCC = 1.8V VCC = 1.8V
0 0
–40 –20 0 20 40 60 80 100 0 1000 2000 3000 4000 5000
TEMPERATURE (°C) 4311 G01
CAPACITANCE (pF) 4311 G02
180
170 150
VCC = 2.5V VCC = 5.5V
160
100
150
50 RP = 2kΩ
140 VCC = 1.8V Measured from 0.3 • VCC to 0.7 • VCC
130 0
–40 –20 0 20 40 60 80 100 0 1000 2000 3000 4000 5000
TEMPERATURE (°C) 4311 G03 CAPACITANCE (pF) 4311 G04
28 0.75
0.7
STANDBY CURRENT (μA)
26 VCC = 5.5V
0.65
24
0.6
VCC = 3.3V
22
0.55
20
0.5
VCC = 2.5V
18 0.45
VCC = 1.8V
16 0.4
–40 –20 0 20 40 60 80 100 1 2 3 4 5 6
TEMPERATURE (°C) 4311 G05
SUPPLY VOLTAGE (V) 4311 G06
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LTC4311
PIN FUNCTIONS
BUS1: Active Pull-up for Bus. Connect to either clock line EXPOSED PAD (DFN Package Only): Exposed Pad may
or data line for 2-wire bus. be left open or connected to device ground.
BUS2: Active Pull-up for Bus. Connect to either clock line GND: Device Ground. Connect this pin to a ground plane
or data line for 2-wire bus. for best results.
ENABLE: Device Enable Input. This is a 1V nominal digital VCC: Supply Voltage Input. Connect this pin to bus supply
threshold input pin. For normal operation drive ENABLE and place a bypass capacitor of at least 0.01μF close to
to a voltage greater than 1.5V. Driving ENABLE below the VCC for best results.
0.4V threshold puts the device in a low (<5μA) current
shutdown mode and puts the BUS pins in a high imped-
ance state. If unused, connect to VCC.
BLOCK DIAGRAM
5mA
BUS1 VCC
SLEW RATE
DETECTOR
5mA
BUS2
SLEW RATE
DETECTOR
VTHR –
CONTROL
+ LOGIC AND
INTERNAL SLEW
COMPARATOR
VTHR –
VCC – 0.4 –
VCC – 0.4 –
ENABLE + GND
1V –
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LTC4311
OPERATION
I2C and SMBus Overview are optimized for low voltage operation, while still meet-
The I2C communication protocol employs open-drain ing standard thresholds for compliant I2C and SMBus
systems.
pull-down drivers with resistive or current source pull-
ups. This protocol allows multiple devices to drive and The slew limited pull-up current is only turned on if the
monitor the bus without bus contention. The simplicity bus line voltage is greater than the supply dependent
of resistive or fixed current source pull-ups is offset by comparator threshold voltage and the positive slew rate
the slow rise times resulting when bus capacitance is of the bus line is greater than the typical 0.2V/μs threshold
high. Rise times can be improved by using lower pull-up of the slew rate detector. The pull-up current remains on
resistor values or higher fixed current source values, but until the voltage on the bus line is within 0.4V of VCC or
the additional current increases the low state bus voltage, the slew rate drops below 0.2V/μs.
decreasing noise margins. Slow rise times can seriously The pull-up current is slew limited to maintain signal
impact data reliability, enforcing a maximum practical bus integrity for busses that have very little capacitive load.
speed well below the established I2C or SMBus maximum In a lightly loaded system a strong pull-up could result in
transmission rate.
fast edge rates that cause reflections on the bus. These
The LTC4311 overcomes these limitations by providing a reflections can be detected by devices on the bus as extra
boosted pull-up current only during positive bus transitions clock edges, could result in erroneous data, or cause a
to quickly slew large bus capacitances. Therefore, rise time stuck bus. An internal slew limit comparator limits the rate
is dramatically improved, especially with maximum or out the pull-up current can slew the bus lines to 100V/μs.
of specification I2C or SMBus loading conditions.
Auto Detect Standby Mode and Shutdown Mode
The LTC4311 has separate but identical circuitry for each
BUS output pin. The circuitry consists of a positive edge When BUS1 and BUS2 are both high the LTC4311 reduces
slew rate detector and a voltage comparator. The voltage the standby supply current. Internal comparators detect
comparator has a supply dependent threshold. At supply when the bus pins are within 400mV of VCC, and reduce
voltages below 2.7V the comparator threshold is 0.3VCC, the supply current to 26μA. When the ENABLE pin is
and at higher voltages the comparator threshold is a grounded, the LTC4311 enters a low (<5μA) supply cur-
constant 0.8V. This allows the rise time accelerator to be rent shutdown mode. Both bus pins are high impedance
used in non-compliant systems where the bus thresholds in shutdown, regardless of the bus pin voltage.
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LTC4311
APPLICATIONS INFORMATION
Selecting the values of RS and RP Low State Noise Margin
The typical configuration for the data bus for a 2-wire bus A low value of VOL, the low state logic level, is desired
is shown in Figure 1. The parameters RP and RS should be for good noise margin. VOL is calculated as follows:
chosen carefully. A description of the process for choosing
the values of RP and RS follows. RL • VCC
VOL =
RL + RP (1)
An external pull-up resistor RP is required in each bus
line to supply a steady state pull-up current if the bus is RL is the series sum of RS and RON, the on resistance of
at logic zero. This pull-up current is used for slewing the the open-drain driver.
bus line during the initial portion of the positive transition
Increasing the value of RP decreases the value of VOL.
in order to activate the LTC4311 pull-up current.
Increasing RL increases the value of VOL.
Using an external pull-up resistor RP to supply steady
state pull-up current provides the freedom to adjust rise Initial Slew Rate
time versus fall time as well as defining the low state The initial slew rate, SR, of the bus is determined by:
logic-level (VOL).
For I/O stage protection from ESD and high voltage spikes VCC – VOL
SR =
on the bus, a series resistor RS (Figure 1) is sometimes RP • CBUS (2)
added to the open drain driver of the bus agents.
SR must be greater than SRTHRESH, the LTC4311 slew rate
detector threshold (0.5V/μs max), in order to activate the
VCC
pull-up current.
LTC4311
DYNAMIC RP
CURRENT
PULL-UP
I2C Rise and Fall Time
CBUS
Bus
Rise time of an I2C line is derived using equation 3.
RS
tr = – Rp • CBUS •
DATA
IN
⎧⎪ VIHMIN – VCC – Rp •IPULLUP AC ⎫⎪
DATA
ln ⎨ ⎬
OUT RON
⎩⎪ VILMAX – VCC – Rp •IPULLUP AC ⎭⎪
(3)
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LTC4311
APPLICATIONS INFORMATION
For an I2C system with fixed input levels, VILMAX = 1.5V A general procedure for selecting RP and RL is as fol-
and VIHMIN = 3V. For I2C systems with VCC related input lows:
levels, VILMAX = 0.3VCC and VIHMIN = 0.7VCC.
1. RL is first selected based on the I/O protection
CBUS is the total capacitance of the I2C line. requirement. Generally, an RS of 100Ω is sufficient for
high voltage spikes and ESD protection. RON is
SMBus Rise and Fall Time determined by the size of the open-drain driver, a large
Rise time of a SMBus line is derived using equations 5, driver will have a lower RON.
6 and 7. 2. The value of RP is determined based on the VOL and
tr = t 1 + t 2 (5) minimum slew rate requirements. The VOL will determine
the smallest resistance value that can be used in a
t1 is the time from when the bus crosses the lower slew system, and the minimum slew requirement will bound
rate measurement point, until the bus reaches VTHR and the the resistance on the upper end. Generally the largest
accelerators fire. The time from when the accelerators fire value of resistance that meets the minimum slew rate
until the bus reaches the upper slew rate measure point is with some margin will be selected.
given by t2. Equations for t1 and t2 are given here:
3. For I2C systems incorporating the LTC4311, the rise
⎧ VTHR – VCC ⎫ times are met under most loading conditions, due to
t1 = –RP • CBUS • ln ⎨ ⎬
⎩ VILMAX – 0.15V – VCC ⎭ the strong accelerator current. The pull-down drivers
(6) are typically low impedance, and therefore fall times
If (VILMAX – 0.15V) > VTHR, then t1 = 0 are not generally an issue. Rise and fall time
requirements must be verified using equations 3 and
4 (for an I2C system) or equations 5 to 8 (for an SMBus
t 2 = –RP • CBUS • system). The value chosen for RP must ensure that
⎧V + 0.15V – VCC – RP •I PULLUPAC ⎫ both the rise and fall time specifications are met
ln ⎨ IHMIN ⎬ simultaneously.
⎩ VTHR – VCC – RP •IPULLUP AC ⎭
(7) I2C Design Example
Fall time of an SMBus line is derived using equation 8: Given the following conditions and requirements:
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LTC4311
APPLICATIONS INFORMATION
This is the lowest resistor value that may be chosen and SMBus Design Example
still meet VOL. Next calculate the largest value of RP that Given the following conditions and requirements for a low
will satisfy SR, the minimum slew rate requirement. Us-
power SMBus system:
ing VOL = 0.4V and SR = 0.5V/μs calculate the value of
RP with equation 2.
VCC = 3.3V NOMINAL
3.3V − 0.4V VOL = 0.4V MAXIMUM
RP =
600pF •0.5V / µs CBUS = 400pF
RP = 9.667k VILMAX = 0.8V,VIHMIN = 2.1V
(11)
tr = 1µs MAXIMUM,t f = 0.3µs MAXIMUM (15)
This is approximately the largest value of RP that will satisfy If an RS of 100Ω is used and the max RON of the driver is
the minimum slew rate requirement. Since RP is larger 200Ω, then RL = 200Ω + 100Ω = 300Ω. Use equation 1
than 2.175k the VOL will be below 0.4V, and the slew rate to find the required RP to meet VOL.
will actually be faster than calculated. Choosing RP = 10k ,
VOL and SR are recalculated. 300Ω•(3.3V – 0.4V)
RP =
0.4V
300Ω•3.3V RP = 2.175k
VOL = = 96mV (16)
300Ω +10kΩ
3.3V – 96mV Calculate Maximum RP from equation 2.
SR = = 0.534V / µs
10kΩ•600pF 3.3V – 0.4V
(12) RP =
400pF •0.5V / µs
The rise and fall times need to be verified using equations RP = 14.5k
3 and 4. (17)
tr = –10kΩ • 600pF • Choose RP = 13k and recalculate VOL and SR.
⎧ 2.31V – 3.3V – 10kΩ • 2.5mA ⎫ 300Ω • 3.3V
In ⎨ ⎬ = 0.297µs VOL = = 74mV
⎩ 0.99V – 3.3V – 10kΩ • 2.5mA ⎭ 300Ω + 13kΩ
(13) 3.3V – 74mV
SR = = 0.62V / µs
t f = 291Ω • 600pF • 13kΩ • 400pF (18)
⎧ 2.31 ⎫
⎪ 3.3V •(10kΩ + 300Ω) – 300Ω ⎪ The rise and fall times need to be verified using equations
In ⎨
0.99V ⎬ = 0.158µs 5 to 8.
⎪ •(10kΩ + 300Ω) – 300Ω ⎪ t1 = –13kΩ • 400pF •
⎩ 3.3V ⎭
(14) ⎧ 0.9V–3.3V ⎫
ln ⎨ ⎬ = 0.515µs
⎩ 0.8V–0.15V–3.3V ⎭ (19)
Both the rise and fall times meet the 0.3μs I2C requirement
and the VOL is satisfied, while meeting the minimum slew
rate requirement, so RP is chosen to be 10k.
If tr is not met, RP should be decreased and if tf is not met
then RP should be increased.
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LTC4311
APPLICATIONS INFORMATION
t 2 = –13kΩ • 400pF • high) at the end of the last bit sent and the slave device
pulling the SDA line low before the rising edge of the ACK
⎧ 2.1V + 0.15V – 3.3V – 13kΩ • 2.5mA ⎫ clock pulse.
In ⎨ ⎬ = 0.205µs
⎩ 0.9V – 3.3V – 13kΩ • 2.5mA ⎭
(20) The LTC4311 5mA pull-up current is activated when the
host releases the SDA line, allowing the voltage to rise
above the LTC4311’s comparator threshold (VTHR). If
tr = t1 + t 2 = 0.515µs + 0.205µs = 0.72µs a slave device has a high value of RS, a longer time is
(21) required for the slave device to pull SDA low before the
rising edge of the ACK clock pulse. To ensure sufficient
t f = 293Ω • 400pF • data setup time for ACK, slave devices with high values
⎧ 2.1V + 0.15V ⎫ of RS should pull the SDA low earlier.
⎪ • (13kΩ + 300Ω) – 300Ω ⎪
In ⎨ 3.3V An alternative is the slave device can hold the SCL line low
0.8V – 0.15V ⎬
⎪ • (13kΩ + 300Ω) – 300Ω ⎪ until the SDA line reaches a stable state. Then, SCL can
⎩ 3.3V ⎭ be released to generate the ACK clock pulse.
= 0.156µs
(22) Multiple LTC4311s in Parallel
In very heavily loaded systems, stronger pull up current
The rise time meets the 1μs SMBus requirement and the may be desired. Two LTC4311’s may be used in parallel
fall time meets the 0.3μs requirement. The VOL is satisfied to increase the total pull up current to meet rise time
while meeting the minimum slew rate requirements, so RP requirements.
is chosen to be 13kΩ. If the rise time was not met due to
a large t1, equation 6 can be used to calculate a maximum Notes on Using the LTC4311 in LTC1694 Applications
value of RP that will meet the rise time requirements.
Although the LTC1694 and LTC4311 are functionally similar
ACK Data Setup Time accelerators for I2C, SMBus, and other comparable open
drain/collector bus applications, the LTC4311 offers a lower
Care must be taken in selecting the value of RS (in series power, higher performance solution in a smaller package
with the pull-down driver) to ensure that the data setup as compared to the LTC1694. These and other differences
time requirement for ACK (acknowledge) is fulfilled. An are listed in Table 1 and must be accounted for if using
acknowledge is the host releasing the SDA line (pulling the LTC4311 in LTC1694 applications.
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LTC4311
PACKAGE DESCRIPTION
DC Package
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703)
2.50 ±0.05
1.15 ±0.05 0.61 ±0.05 2.00 ±0.10
(2 SIDES) (4 SIDES)
PACKAGE PIN 1 BAR PIN 1
OUTLINE TOP MARK CHAMFER OF
(SEE NOTE 6) EXPOSED PAD
(DC6) DFN 1103
3 1
0.25 ± 0.05 0.25 ± 0.05
0.50 BSC 0.200 REF 0.75 ±0.05 0.50 BSC
1.42 ±0.05 1.37 ±0.05
(2 SIDES) (2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
M0-229 VARIATION OF (WCCD-2) MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
2. DRAWING NOT TO SCALE 5. EXPOSED PAD SHALL BE SOLDER PLATED
3. ALL DIMENSIONS ARE IN MILLIMETERS 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
SC6 Package
6-Lead Plastic SC70
(Reference LTC DWG # 05-08-1638 Rev B)
1.00 REF
INDEX AREA
(NOTE 6)
2.8 BSC 1.8 REF 1.80 – 2.40 1.15 – 1.35
(NOTE 4)
PIN 1
0.00 – 0.10
REF
1.00 MAX
GAUGE PLANE
0.15 BSC
0.26 – 0.46
0.10 – 0.18 SC6 SC70 1205 REV B
(NOTE 3)
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS 5. MOLD FLASH SHALL NOT EXCEED 0.254mm
2. DRAWING NOT TO SCALE 6. DETAILS OF THE PIN 1 IDENTIFIER ARE OPTIONAL,
3. DIMENSIONS ARE INCLUSIVE OF PLATING BUT MUST BE LOCATED WITHIN THE INDEX AREA
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 7. EIAJ PACKAGE REFERENCE IS EIAJ SC-70
8. JEDEC PACKAGE REFERENCE IS MO-203 VARIATION AB
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC4311
TYPICAL APPLICATION
Application Utilizing Low Current Shutdown
VCC VCC
2.5V LTC4311 2.5V
VCC BUS1
C1
OFF ON ENABLE R1 R2
0.01μF
10k 10k
GND BUS2
I2C
SCL
SDA
DEVICE 1 DEVICE N
4311 TA02
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