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Datasheet

The SSC2016S is a Critical Conduction Mode control IC designed for power factor correction, enabling low standby power and minimal external components. It features various protection functions including overcurrent and overvoltage protection, and is suitable for applications such as AC/DC power supplies and digital appliances. The IC operates efficiently with a maximum switching frequency of 400 kHz and supports output power up to 200 W.

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0% found this document useful (0 votes)
8 views22 pages

Datasheet

The SSC2016S is a Critical Conduction Mode control IC designed for power factor correction, enabling low standby power and minimal external components. It features various protection functions including overcurrent and overvoltage protection, and is suitable for applications such as AC/DC power supplies and digital appliances. The IC operates efficiently with a maximum switching frequency of 400 kHz and supports output power up to 200 W.

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traped1
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Critical Conduction Mode PFC Control IC

SSC2016S Data Sheet

Description Package
SSC2016S is a Critical Conduction Mode (CRM) SOIC8
control IC for power factor correction (PFC).
Since no input voltage sensing is required, the IC
allows the realization of low standby power and the low FB 1 8 VCC

number of external components. The product achieves


CT 2 7 OUT
high cost-performance and high efficiency PFC
converter system. COMP 3 6 GND

CS 4 5 ZCD

Not to Scale
Features
● Low Standby Power
Electrical Characteristics
(No input voltage sensing required)
● Maximum Switching Frequency Limitation Function ● VCC Pin Absolute Maximum Ratings, VCC = 28 V
● Minimum On-time Limitation Function ● OUT Pin Source Current, IOUT(SRC) = −500 mA
● Restart Function ● OUT Pin Sink Current, IOUT(SNK) = 1000 mA
● Protection Functions
Overcurrent Protection 1 (OCP1): Pulse-by-pulse
Overcurrent Protection 2 (OCP2): Latched shutdown
Overvoltage Protection (OVP): Auto-restart Application
FB Pin Undervoltage Protection (FB_UVP):
Auto-restart PFC circuit up to 200 W of output power such as:
Thermal Shutdown Protection with hysteresis (TSD): ● AC/DC Power Supply
Auto-restart ● Digital Appliances (large size LCD television and so
forth).
● OA Equipment (Computer, Server, Monitor, and so
forth).
Typical Application
● Communication Facilities
● Other Switching Mode Power Supply, SMPS
DBYP
BR1 DFW
P
VAC VOUT
D1 R2
T1
D Q1
R3 R4
C1 C2
RVS1
R1
RCS
LINE
GND

R5
U1
C5
ZCD CS
5 4
C6 RS CS
NC

GND COMP
6 3
CP
C7 OUT CT
7 2
C4
External power
supply VCC FB
8 1

SSC2016S C3 RVS2

TC_SSC2016S_1_R2

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© SANKEN ELECTRIC CO.,LTD. 2015
SSC2016S

CONTENTS
Description ------------------------------------------------------------------------------------------------------ 1
CONTENTS ---------------------------------------------------------------------------------------------------- 2
1. Absolute Maximum Ratings----------------------------------------------------------------------------- 3
2. Electrical Characteristics -------------------------------------------------------------------------------- 4
3. Block Diagram --------------------------------------------------------------------------------------------- 6
4. Pin Configuration Definitions--------------------------------------------------------------------------- 6
5. Typical Application --------------------------------------------------------------------------------------- 7
6. External Dimensions -------------------------------------------------------------------------------------- 8
7. Marking Diagram ----------------------------------------------------------------------------------------- 8
8. Operational Description --------------------------------------------------------------------------------- 9
8.1 Critical Conduction Mode: CRM ---------------------------------------------------------------- 9
8.2 Startup Operation --------------------------------------------------------------------------------- 10
8.2.1 To Use an External Power Supply ------------------------------------------------------- 10
8.2.2 To Use an Auxiliary Winding ------------------------------------------------------------- 10
8.3 Restart Circuit ------------------------------------------------------------------------------------- 11
8.4 Maximum On-time Setting ---------------------------------------------------------------------- 11
8.5 Zero Current Detection and Bottom-on Timing Setting ----------------------------------- 11
8.6 Maximum Switching Frequency Limitation Function ------------------------------------- 12
8.7 Overcurrent Protection (OCP) ----------------------------------------------------------------- 12
8.8 Overvoltage Protection (OVP) ------------------------------------------------------------------ 13
8.9 FB Pin Under Voltage Protection (FB_UVP) ------------------------------------------------ 13
8.10 Thermal Shutdown (TSD) ----------------------------------------------------------------------- 13
9. Design Notes ---------------------------------------------------------------------------------------------- 13
9.1 Inductor Design ------------------------------------------------------------------------------------ 13
9.1.1 Boost winding, P ----------------------------------------------------------------------------- 13
9.1.2 Auxiliary Winding, D ----------------------------------------------------------------------- 14
9.2 External Components ---------------------------------------------------------------------------- 15
9.2.1 FB Pin Peripheral Circuit (Output VoltageDetection) ------------------------------- 15
9.2.2 COMP Pin Peripheral Circuit, RS, CS and CP ----------------------------------------- 15
9.2.3 CT Pin Peripheral Circuit, C4 ------------------------------------------------------------ 15
9.2.4 CS Pin Peripheral Circuit, RCS, R5 and C5 -------------------------------------------- 15
9.2.5 ZCD Pin Peripheral Circuit, R1 and C6 ------------------------------------------------ 16
9.2.6 OUT Pin Peripheral Circuit (Gate Drive Circuit) ------------------------------------ 16
9.2.7 VCC Pin Peripheral Circuit --------------------------------------------------------------- 17
9.2.8 Power MOSFET, Q1 ------------------------------------------------------------------------ 17
9.2.9 Boost Diode, DFW ---------------------------------------------------------------------------- 18
9.2.10 Bypass Diode, DBYP -------------------------------------------------------------------------- 18
9.2.11 Output Capacitor, C2 ---------------------------------------------------------------------- 18
9.3 PCB Trace Layout and Component Placement --------------------------------------------- 18
10. Reference Design of Power Supply ------------------------------------------------------------------ 20
Important Notes ---------------------------------------------------------------------------------------------- 22

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SSC2016S

1. Absolute Maximum Ratings


Current polarities are defined as follows: a current flow going into the IC (sinking) is positive current (+); and a
current flow coming out of the IC (sourcing) is negative current (−).
Unless specifically noted TA = 25 °C.
Parameter Symbol Conditions Pins Rating Unit Remarks
FB Pin Voltage VFB 1–6 − 0.3 to 5 V
CT Pin Voltage VCT 2–6 − 0.3 to 5 V
COMP Pin Voltage VCOMP 3–6 − 0.3 to 5 V
COMP Pin Current ICOMP 3–6 − 100 to 100 µA
CS Pin Voltage (DC) VCS(DC) 4–6 − 0.3 to 5 V
CS Pin Voltage (Pulse) VCS(PULSE) Pulse with =1µs 4–6 − 2 to 5 V
ZCD Pin Voltage VZCD 5–6 − 10 to 10 V
ZCD Pin Current IZCD 5–6 − 10 to 10 mA
OUT Pin Voltage VOUT 7–6 − 0.3 to VCC + 0.3 V
OUT Pin Source Current IOUT(SRC) 7–6 − 500 mA
OUT Pin Sink Current IOUT(SNK) 7–6 1000 mA
VCC Pin Voltage VCC 8–6 28 V
Allowable Power Dissipation PD − 0.5 W
Operating Ambient Temperature TOP − −40 to 110 °C
Storage Temperature Tstg − −40 to 150 °C
Junction Temperature Tj − 150 °C

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SSC2016S

2. Electrical Characteristics
Current polarities are defined as follows: a current flow going into the IC (sinking) is positive current (+); and a
current flow coming out of the IC (sourcing) is negative current (−).
Unless specifically noted, TA = 25 °C, VCC = 14 V.
Parameter Symbol Conditions Pins Min. Typ. Max. Unit
Power Supply Operation
Operation Start Voltage VCC(ON) 8–6 7.5 8.5 9.5 V
Operation Stop Voltage VCC(OFF) 8–6 6.5 7.5 8.5 V
Operation Voltage Hysteresis VCC(HYS) 8–6 0.5 1.0 1.5 V
Circuit Current in Operation ICC(ON) 8–6 1.2 2.1 3.2 mA
Circuit Current in Non-Operation ICC(OFF) VCC = 7 V 8–6 – 50 100 µA
Frequency Control
FB Pin Sink Current IFB 1–6 0.3 0.7 1.1 µA
Feedback Voltage Reference VREF 1–6 2.475 2.500 2.525 V
VCC = 11.5 V
VREF Line Regulation VREF(LR) 1–6 − 8.0 1.0 12.0 mV
~ 28 V
COMP Pin Source Current 1 ICOMP(SRC)1 VFB = 2.4 V 3–6 − 22 − 11 −1 µA
COMP Pin Sink Current 1 ICOMP(SNK)1 VFB = 2.6 V 3–6 1 11 22 µA
COMP Pin Sink Current 2 ICOMP(SNK)2 VFB = 2.7 V 3–6 15 35 55 µA
Error Amplifier Transconductance 1–6
gm 60 100 140 µS
Gain 3–6
Zero Duty COMP Voltage VCOMP(ZD) 3–6 0.50 0.65 0.90 V
Restart Time tRS 7–6 140 220 300 µs
ON Time in Restart Operation tON(RS) 7–6 0.5 1.7 2.9 µs
CT Pin Source Current ICT 2–6 − 165 − 150 − 135 µA
CT Pin Threshold Voltage VCT(OFF) VCOMP = 4.5V 2–6 2.60 2.75 2.90 V
CT Pin Delay Time of Control tDLY(PWM) VCOMP = 2.2V 2–6 − 120 220 ns
Maximum Switching Frequency (1)
fMAX 7–6 − 300 400 kHz
Drive Output
Output Voltage (High) VOH IOUT = –100 mA 7–6 10.0 12.0 13.5 V
Output Voltage (low) VOL IOUT = 200 mA 7–6 0.40 0.75 1.25 V
Output Rise Time (2)
tr COUT = 1000 pF 7–6 − 60 120 ns
Output Fall Time (2)
tf COUT = 1000 pF 7–6 − 20 70 ns
Zero Current Detection

(1)
Design assurance item
(2)
Shown in Figure 3-1
90%

VOUT 10%
tr tf
Figure 3-1 Switching time

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SSC2016S

Parameter Symbol Conditions Pins Min. Typ. Max. Unit


Zero Current Detection Threshold
VZCD(H) 5–6 1.25 1.40 1.55 V
Voltage (High)
Zero Current Detection Threshold
VZCD(L) 5–6 0.60 0.70 0.80 V
Voltage (Low)
Zero Current Detection Delay
tDLY(ZCD) 5–6 − 70 160 ns
Time (1)
ZCD Pin Clamp Voltage VZCD(CL) IZCD=3mA 5–6 6.5 7.7 9.0 V
Overcurrent Protection Function
Overcurrent Protection Threshold
VCS(OCP1) 4–6 0.475 0.500 0.525 V
Voltage 1
Overcurrent Protection Threshold
VCS(OCP2) 4–6 1.35 1.50 1.65 V
Voltage 2
Overcurrent Protection Delay Time tDLY(OCP) 4–6 90 215 340 ns
CS Pin Source Current ICS 4–6 − 40 − 20 − 10 µA
FB Pin Protection Function
Overvoltage Protection Threshold 1.040 1.060 1.080
VOVP 1–6 V
Voltage ×VREF ×VREF ×VREF
Overvoltage Protection Hysteresis VOVP(HYS) 1–6 40 60 80 mV
Undervoltage Protection Threshold
VUVP 1–6 200 300 400 mV
Voltage
Undervoltage Protection Hysteresis VUVP(HYS) 1–6 70 110 150 mV
Thermal Shutdown Protection
Thermal Shutdown Threshold (1) Tj(TSD) – 135 150 – °C
Thermal Shutdown Hysteresis (1) Tj(TSDHYS) – – 10 – °C
Thermal Resistance
Junction to Ambient Resistance (1) θj-A – – – 180 °C/W

(1)
Design assurance item

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SSC2016S

3. Block Diagram

OVP

REG 8 VCC
1.060V×VREF UVLO

UVP 8.5V/7.5V

300mV TSD
/410mV
Error Amp. 7 OUT
FB 1
R Q

VREF=2.500V S
6 GND
RAMP
CT 2 OSC Restart VCC
timer
Negative
clamp
COMP 3
fMAX 5 ZCD
OCP1
limit
CS 4 Down edge det
1.40V
/0.70V
0.500V
OCP2

S Q

1.50V Power on
reset R

BD_SSC2016S_R5

4. Pin Configuration Definitions


Number Name Function
FB 1 8 VCC Feedback signal input, Overvoltage Protection
1 FB signal input and FB pin Undervoltage Protection
CT 2 7 OUT
signal input
COMP 3 6 GND 2 CT Timing capacitor connection
CS 4 5 ZCD 3 COMP Phase compensation
4 CS Overcurrent Protection signal input
Zero current detection signal input and
5 ZCD
bottom-on-timing adjustment
6 GND Ground
7 OUT Gate drive output
8 VCC Power supply input for control circuit

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SSC2016S

5. Typical Application

DBYP
BR1
P DFW
VAC VOUT
D1 R2
T1
D Q1
R3 R4
C1 C2
RVS1
R1
RCS
LINE
GND

R5
U1
C5
ZCD CS
5 4
C6 RS CS
NC

GND COMP
6 3
CP
C7 OUT CT
7 2
C4
External power
supply VCC FB
8 1

SSC2016S C3 RVS2

TC_SSC2016S_1_R2

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© SANKEN ELECTRIC CO.,LTD. 2015
SSC2016S

6. External Dimensions
SOIC8

3.9±0.2
6.0±0.2
0 ~ 10°
0.605 TYP

5.02±0.2
1.5±0.05
0.15±0.05

1.27
0.60±0.2

0.4±0.05

0.15
NOTES:
● All liner dimensions are in millimeters
● Pb-free. Device composition compliant with the RoHS directive.

7. Marking Diagram
8
SC2016
Part Number
SKYMD
Lot Number:
Y is the last digit of the year of manufacture (0 to 9)
1
M is the month of the year (1 to 9, O, N, or D)
D is a period of days:
1: the first 10 days of the month (1st to 10th)
2: the second 10 days of the month (11th to 20th)
3: the last 10–11 days of the month (21st to 31st)
Control Number

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SSC2016S

8. Operational Description voltage RVS2 is compared with the Feedback Voltage


Reference VREF = 2.500 V by using error amplifier
All of the parameter values used in these descriptions (Error AMP) connected to FB pin. The output of the
are typical values, unless they are specified as minimum Error AMP is averaged and the phase is compensated.
or maximum. This signal VCOMP is compared with the ramp signal
Current polarities are defined as follows: a current VOSC to achieve the on-time control. The on-time
flow going into the IC (sinking) is positive current (+); becomes almost constant in commercial cycle by setting
and a current flow coming out of the IC (sourcing) is VCOMP to respond below 20 Hz (Figure 8-4). This is
negative current (−). achieved by tuning the capacitor connected to COMP
pin.
The off-time is set by detecting the zero current signal
8.1 Critical Conduction Mode: CRM of boost winding P. The zero current is detected by
auxiliary winding D and ZCD pin.
Figure 8-1 and Figure 8-2 show the PFC circuit and
CRM operation waveform. The IC performs the on/off T1 DFW VOUT
P
operation of switching device Q1 in critical mode (the
inductor current is zero). Thus, the low drain current D
U1
RVS1
Error AMP
variation di/dt of power MOSFET is accomplished. Also, Q1 PWM COMP VCOMP FB 1
7
adjusting the turn-on timing at the bottom point of VDS OUT Q R

free oscillation waveform (quasi-resonant operation), S


2.500V

low noise and high efficiency PFC circuit is realized. VSET VOSC C3 RVS2

ZCD 3
1.40 V
COMP
RCS /0.70 V
T1 DFW OSC
RS
R1 ZCD CT GND
5 2 6
Q1 IOFF CP
C1 D C2 C6 C4 CS
VAC
ION
S

Figure 8-3. CRM Control Circuit

Figure 8-1. PFC Circuit √2×VACRMS


VAC(t)
IL(t) ILPEAK

IL=ION+IOFF √2×IACRMS
ILPEAK IAC(t)
1
I L ( AVG ) = × ILPEAK
2

ION

tON tOFF

IOFF
VCOMP
VOSC
Bottom on Free oscillation
VSET

Q1 VDS OUT pin voltage

OFF OFF
ILPEAK(t)
ON ON VAC(t)
IL(AVG.)(t)
Turn on delay time

Figure 8-2. CRM Operation and Bottom On Operation


Figure 8-4 CRM Operation Waveforms

Figure 8-3 shows the internal CRM control circuit.


The power MOSFET Q1 starts switching operation by The off duty DOFF of boost converter in CRM mode
self-oscillation. have the relation of DOFF(t) = VAC(t)/VOUT and is
The on-time control is as follows: the detection proportional to input voltage, where VAC(t) is the input

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SSC2016S

voltage of AC line as a function of time. ICC


As a result of aforementioned control shown in Figure
8-4, the peak current ILPEAK of the inductance current IL
becomes sinusoidal. Since the averaged input current

Startup
become similar to AC input voltage waveform by Low

Stop
Pass Filter at input stage, high power factor is achieved.

8.2 Startup Operation VCC pin


voltage
Figure 8-5 and Figure 8-7 show the VCC pin VCC(OFF) VCC(ON)
peripheral circuit. Figure 8-5 shows how to use an
external power supply. Figure 8-7 shows how to use an
Figure 8-6. Relationship between VCC Pin Voltage
auxiliary winding.
and ICC

8.2.1 To Use an External Power Supply 8.2.2 To Use an Auxiliary Winding


When an external power supply shown in Figure 8-5
When an auxiliary winding is used as shown in Figure
is used, the startup operation is as follows.
8-7, CVCC is charged through RST at startup. When VCC
As shown in Figure 8-6, when VCC pin voltage rises
pin voltage rises to VCC(ON) = 8.5 V, the control circuit
to the Operation Start Voltage VCC(ON) = 8.5 V, the
starts operation.
control circuit starts operation and the COMP pin
Figure 8-8 shows the VCC pin voltage behavior
voltage increases. The COMP pin voltage increases to
during startup period.
the Zero Duty COMP Voltage VCOMP(ZD) = 0.65 V,
When the VCC pin voltage reaches VCC(ON), the
switching operation starts.
control circuit starts operation. Then the circuit current
When the VCC pin voltage decreases to
increases and the VCC pin voltage decreases. At the
VCC(OFF) = 7.5 V, the control circuit stops operation by
same time, the auxiliary winding voltage VD increases in
Undervoltage Lockout (UVLO) circuit, and reverts to
proportion to the output voltage. These are all balanced
the state before startup.
to produce VCC pin voltage.
Since the COMP pin voltage rises from zero during
The value of CVCC, the turns ratio of boost winding P
startup period, the VCOMP signal shown in Figure 8-3
and auxiliary winding D should be set so that VCC pin
gradually rises from low voltage. The on-width
voltage is maintained higher than VCC(OFF) (See Section
gradually increased to restrict the rise of output power
9.1.2).
by the Softstart Function. Thus, the stress of the
If the values of RST and CVCC are large, the startup
peripheral component is reduced.
time becomes longer. Adjustment is necessary in actual
operation.
U1
When the COMP pin voltage increases to the Zero
8 Duty COMP Voltage VCOMP(ZD) = 0.65 V after the
VCC
External control circuit starts operation, switching operation starts
power supply and the circuit current is supplied from auxiliary
C7 winding D as follows.
3
COMP
VB and VD are the voltage of auxiliary winding during
RS
CP
GND
Q1 on and off, respectively.
When Q1 is on, CCP is charged by VB. When Q1 is off,
CS 6
the capacitor connected to VCC pin, CVCC, is charged by
VD + VB (=VCCP).
VB is calculated using Equation (1).
Figure 8-5. VCC Pin Peripheral Circuit
(Power supply from external power supply) ND
VB = VIN × (V) (1)
NP

Where
VIN: C1 voltage (V)
NP: Number of turns of boost winding P (turns)
ND: Number of turns of auxiliary winding D (turns)

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8.4 Maximum On-time Setting


In order to reduce audible noise of transformer at
VAC
T1
VOUT transient state, the Maximum on-time, tON(MAX), should
P
be set. The tON(MAX) depends on the value of C4
DFW
Q1
connected to CT pin. Section 9.1 shows about tON(MAX)
C1 RST
VIN D VD
setting.
VB RCS

LINE
GND
8.5 Zero Current Detection and
RZ
Bottom-on Timing Setting
CCP VCCP
8 Figure 8-9 shows the peripheral circuit of ZCD pin,
VCC DVCC
CVCC Figure 8-10 shows the zero current detection waveform.
U1 DZVCC The off-time is determined by detecting the zero
6
GND current of the boost winding P via the auxiliary winding
D and ZCD pin
The polarity of winding P and winding D of
Figure 8-7. VCC Pin Peripheral Circuit transformer T1 are shown in Figure 8-9.
(Power supply from auxiliary winding) When the OUT pin voltage becomes low and the
power MOSFET turns off, the ZCD pin voltage becomes
the voltage of auxiliary winding D as shown in Figure
VCC IC startup Startup success
Target
8-10. After the turning off of the power MOSFET, when
Operating ZCD pin voltage is above VZCD(H) = 1.40 V, OUT pin
VCC(ON) Voltage voltage is kept to be Low. When ZCD pin voltage
Increased by output
voltage rising becomes below VZCD(L) = 0.70 V, OUT pin voltage
VCC(OFF) becomes High and power MOSFET turns on.
After the turning off of the power MOSFET, when the
Startup failure current in boost winding become zero, VDS waveform
starts free oscillation based on the inductance LP, the
output capacitance of power MOSFET COSS and the
Time
parasitic capacitance. The bottom point of VDS is
calculated as follows:
Figure 8-8. VCC During Startup Period
t HFP ≈ π�LP × CV (s) (2)

8.3 Restart Circuit where


The IC is self-oscillation type. The off-time of OUT tHFP: Half cycle of free oscillation (s)
pin is set by the detecting zero current signal at ZCD LP: Inductance of boost winding (H)
pin. CV: Combined output capacitance of power MOSFET
When the off-time of OUT pin is maintained for COSS and parasitic capacitanc (F)
tRS = 220 μs or more, the restart circuit is activated and
OUT pin turns on. The ON time of the OUT pin is In order to set the timing of turn on to the bottom
tON(RS) = 1.7 μs in the restart operation. point of VDS as shown in Figure 8-11, adjust the turn on
At intermittent oscillation period in startup and light delay time tHFP by using C6 and R1 in actual operation
load, the restart circuit is activated and the switching codition as shown in Figure 8-9. Since R1 have a role as
operation is stabilized. the current limiting resistor of ZCD pin, adjust the C6
Since tRS = 220 μs corresponds to the operational value if R1 value exceeds the range of limiting.
frequency of 6.25 kHz, the minimum frequency should
be set to higher than 20 kHz (above audible frequency)
at the inductance value design.

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8.6 Maximum Switching Frequency


VP
P
DFW VOUT Limitation Function
T1
D
In the CRM operation, the switching frequency of a
C1 Q1
VD 7 OUT
U1
power MOSFET is varied in a period of sinusoidal AC
input voltage. The switching frequency is lowest in the
1.40V peak of AC input voltage and is high as getting close to
R1 RCS /0.70V
OSC the bottom of it. In addition, when output load decreases,
the switching frequency increases entirely. In order to
ZCD CT GND
reduce the switching loss, the IC has the Maximum
5 2 6
Switching Frequency Limitation Function that limits the
C6 C4
switching frequency to fMAX of 300 kHz.

Figure 8-9. ZCD Pin Peripheral Circuit 8.7 Overcurrent Protection (OCP)
Figure 8-12 shows the CS pin peripheral circuit and
OUT pin voltage internal circuit. The inductor current, IL is detected by
L H L H L the detection resistor, RCS. The detection voltage, VRCS,
Primary winding P is fed into CS pin. As shown in Figure 8-12, the CS pin
voltage, VP is connected to capacitor-resistor filter (R5 and C5).
0
The IC has two Overcurrent Protection (OCP)
Auxiliary winding D threshold voltages.
voltage, VD
0
● OCP1
ZCD pin voltage Turn-on point When VRCS increases VCS(OCP1) = 0.500 V or more, the
VZCD(H) output of the OUT pin becomes Low by
VZCD(L) pulse-by-pulse.
0
Turn-on ● OCP2
Drain to Source delay time OCP2 is activated by malfunctions such as the short
voltage, VDS
of a boost diode, DFW. If the instantaneous large
current flows to a power MOSFET and the CS pin
Drain current, ID voltage increases to VCS(OSP2) = 1.50 V or more and
this operation continues seven times, the output of
Inductor current, OUT pin is latched to low level.
IL Releasing the latched state is done by turning off the
input voltage and by dropping VCC pin voltage below
VCC(OFF).
Figure 8-10. Zero Current Detection Waveform
D
T1 DFW VOUT
tDLY
P
U1 C2
Bottom-on 7
Q1 OUT
Free oscillation OCP1
4 CS
R5 VCS(OCP1)
= 0.500V

Proper delay time


OCP2
RCS C5
VRCS VCS(OCP2)
= 1.5V

GND
6
Delay time is short. Delay time is Long.
Make R1 or C6 value larger. Make R1 or C6 value smaller.

Figure 8-12. The CS Pin Peripheral Circuit


Figure 8-11. VDS Turn On Timing and Internal Circuit.

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8.8 Overvoltage Protection (OVP) 8.10 Thermal Shutdown (TSD)


Figure 8-13 shows the waveforms of Overvoltage < Using External Power Supply >
Protection (OVP) operation. When the FB pin voltage When the temperature of control circuit increases to
increase to Overvoltage Protection Threshold Voltage, Tj(TSD) = 150 °C or more, Thermal Shutdown (TSD) is
VOVP, OUT pin voltage become Low immediately and activated and the IC stops switching operation.
the switching operation stops. As a result, the rise of When the fault condition is removed and the
output voltage is prevented. VOVP is 1.060 times the temperature decreases to less than Tj(TSD) – Tj(TSDHYS), the
Feedback Voltage Reference, VREF = 2.500 V. When the IC returns to normal operation automatically.
cause of the overvoltage is removed and FB pin voltage
decreases to VOVP − VOVP(HYS) the switching operation < Using Auxiliary Winding D for VCC supply >
restarts. When TSD is activated and the IC stops switching
operation, VCC pin voltage decreases to VCC(OFF) and the
FB pin voltage control circuit stops operation. After that, the IC reverts
VOVP to the initial state by UVLO circuit, and the IC starts
operation when VCC pin voltage increases to VCC(ON) by
VOVP(HYS) startup current. Thus the intermittent operation by
UVLO is repeated in TSD state.
OUT pin When the fault condition is removed and the
voltage temperature decreases to less than Tj(TSD) – Tj(TSDHYS), the
IC returns to normal operation automatically.

Figure 8-13. OVP Waveforms


9. Design Notes
8.9 FB Pin Under Voltage Protection
(FB_UVP) 9.1 Inductor Design
FB pin Under Voltage Protection (FB_UVP) is Inductor T1 consists of a boost winding P and
activated when the FB pin voltage is decreased by the auxiliary winding D. The winding P is used for boosting
malfunctions in feedback loop such as the open of RVS1, the voltage and winding D is used for off-timing
the short of RVS2, or the open of FB pin. detection.
Figure 8-14 shows the FB pin peripheral circuit and The calculation methods of winding P and winding D
internal circuit. When the FB pin voltage is decreased to are as shown below. Since the following calculating
VUVP = 300 mV or less, the OUT pin output is turned-off formulas are approximated, the peak current and the
immediately and switching operation stops. This frequency of operational waveforms may be different
prevents the rise of output voltage. When the cause of from the setting value at calculating. Eventually, the
malfunction is removed and the FB pin voltage rises to inductance value should be adjusted in actual operation.
VUVP + VUVP(HYS), the switching operation restarts. Apply proper design margin to temperature rise by
core loss and copper loss.
U1 VOUT

PWM COMP Error AMP RVS1


FB
1 9.1.1 Boost winding, P
IFB
VREF RVS2 Inductance LP of PFC in CRM mode is calculated as
= 2.500V
VOSC C3
follows:

OVP VOVP 1) Output Voltage, VOUT


= 1.060×VREF
VOVP(HYS) The output voltage VOUT of boost-converter should be
= 60mV
set higher than peak value of input voltage as
VUVP following equation:
= 300mV
UVP
VUVP(HYS)
GND = 110mV
VOUT ≥ √2 × VACRMS(MAX) × VDIF (V) (3)
6

where
Figure 8-14. The FB Pin Peripheral Circuit and VACRMS(MAX): Maximum AC input voltage rms value (V)
Internal Circuit. VDIF: Boost voltage (about 10V) (V)

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2) Operational Frequency, fSW(SET) (see Section 8.4). C4 should be set so as tON(MAX) is


Determine fSW(SET) that is minimum operational larger than tON(MAX)_OP that is calculated by Equation
frequency at the peak of the AC line waveform. The (6). The value of C4 is about 330 pF to 1500 pF
frequency becomes higher with lowering the input
voltage. The frequency at the peak of the AC line C4 × VCT(OFF)
t ON(MAX) = (s) (7)
waveform, fSW(SET) should be set more than the |ICT |
audible frequency (20 kHz).
where
3) Inductance, LP C4: Capacitance of capacitor connected to CT pin
Substituting both minimum and maximum of AC (μF)
input voltage to VACRMS, choose a smaller one as LP VCT(OFF): CT Pin Threshold Voltage (V)
value. LP is calculated as follows: ICT: CT Pin Source Current (μA)

η × VACRMS 2 × �VOUT − √2 × VACRMS �


LP = (H) (4)
2 × POUT × fSW(SET) × VOUT 9.1.2 Auxiliary Winding, D
Figure 9-1 shows the polarity of boost winding P and
where
auxiliary winding D.
VACRMS: Maximum or minimum AC input voltage rms
value (V)
VOUT
POUT: Output Power (W) T1
P
fSW(SET): Minimum operational frequency at the peak of DFW
the AC line waveform (kHz) D
U1 Q1
(The operational frequency becomes lowest at the peak OUT
C1 7
of the AC line waveform. fSW(SET) should be set above R1
frequency of 20 kHz.) 5
ZCD
η: Efficiency of PFC CT GND RCS
C6
(In general, the range of η is 0.90 to 0.97, depending on 2 6
on-resistance of power MOSFET RDS(ON) and forward C4

voltage drop of rectifier diode VF.)

4) Inductor peak current, ILP


Figure 9-1. ZCD Peripheral Circuit
ILP is peak current at the minimum of AC input
voltage waveform. ILP calculated as follows:
Given the number of windings of each winding as NP
2√2 × POUT and ND, the turn ratio ND/NP is set satisfying following
ILP = (A) (5) conditions.
η × VACRMS(MIN)
The condition of ND/NP making ZCD pin voltage
above VZCD(H) = 1.40 V after power MOSFET turns off
where,
is expressed as follows:
POUT : Output power (W)
VACRMS(MIN) : Minimum AC input voltage rms value (V)
ND VZCD(H)
η : Efficiency of PFC (About 0.90 to 0.97) > (8)
NP VOUT − √2 × VACRMS(MAX)
5) Maximum On-time, tON(SET)MAX
tON(MAX)_OP is calculated by Equation (6) with results where
of Equation (4) and Equation (5). tON(MAX)_OP is the NP: The number of turns of boost winding P (turns)
maximum on time of the peak voltage of the ND: The number of turns of auxiliary winding D (turns)
minimum AC input voltage. VOUT: Output voltage (V)
VACRMS(MAX): Maximum AC input voltage rms value
L P × IP (turns)
t ON(MAX)_OP = (s) (6)
√2 × VACRMS(MIN)
When power supply of VCC pin is suplied from
auxiliary winding as shown in Figure 9-2, the condition
where,
of ND/NP is set to larger rate of Equation (8) or Equation
LP : Inductance value of the result of Equation (4)
(9).
VACRMS(MIN) : Minimum AC input voltage rms value (V)
The maximum VCC pin input voltage is limited by
Equation (7) shows the relationship between the zener voltage of DZVCC. The minimum VCC pin
maximum on time, tON(MAX), and CT pin capacitor, C4 input voltage must be set higher than the maximum

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value of VCC(ON),, 9.5 V. 9.2.1 FB Pin Peripheral Circuit


(Output VoltageDetection)
ND 2�VCC(ON) max. +VFVCC �
> (9) The output voltage VOUT is set using RVS1 and RVS2. It
NP VOUT
is expressed by the following formula:
where
VREF
NP: The number of turns of boost winding P (turns) VOUT = � + IFB � × R VS1 + VREF (V) (10)
ND: The number of turns of auxiliary winding D R VS2
(turns)
VOUT: Output voltage (V) where
VCC(ON)max.: the maximum value of Operation Start VREF: Feedback Voltage Reference = 2.500 V
Voltage, VCC(ON), (V) IFB: FB sink current= 0.7 µA
VFVCC: Forwerd voltage of DVCC (V) RVS1, RVS2: Combined resistance to set VOUT (Ω)

Since RVS1 have applied high voltage and have high


VAC
T1 DFW VOUT resistance value, RVS1 should be selected from resistors
P
designed against electromigration or use a combination
VFFW of resistors for that.
C1 Q1
RST The value of capacitor C3 between FB pin and GND
VIN D
pin is set approximately 100 pF to 0.01 μF, in order to
RCS reduce the switching noise.
LINE
RZ GND

VFVCC CCP 9.2.2 COMP Pin Peripheral Circuit, RS,


8
VCC DVCC CS and CP
CVCC
U1 The FB pin voltage is induced into internal Error
DZVCC
6
GND AMP. The output voltage of the Error AMP is averaged
by the COMP pin. The on-time control is achieved by
comparing the signal VCOMP and the ramp signal VOSC.
Figure 9-2. VCC Pin Peripheral Circuit CS and RS adjust the response speed of changing on-time
(Power supply from auxiliary winding) according to output power.
The typical value of CS and RS are 1 μF and 68 kΩ,
respectively. When CS value is too large, the response
becomes slow at dynamic variation of output and the
9.2 External Components output voltage decreases.
Take care to use properly rated, including derating as Since CS and RS affect on the soft-start period at
necessary and proper type of components. startup, adjustment is necessary in actual operation.
Figure 9-3 shows the IC peripheral circuit. The ripple of output detection signal is averaged by
CP. When the CP value is too small, the IC operation
DBYP may become unstable due to the output ripple. The value
P DFW
VOUT
of capacitor CP is approximately 1 μF.
D1 R2
T1
D Q1
R3 R4
C1
C2 9.2.3 CT Pin Peripheral Circuit, C4
R1
RCS C4 in Figure 9-3 is a capacitor for the maximum on
LINE
GND time setting. See Section 9.1.1 for C4 setting.
R5
U1
C5
ZCD CS
C6
5 4
RS CS 9.2.4 CS Pin Peripheral Circuit, RCS, R5
NC

GND COMP RVS1


6 3
CP
and C5
C7 OUT CT
7 2 C4
External power
RCS shown in Figure 9-3 is current sensing resistor.
VCC FB
supply 8 1 RCS is the resistor for the current detection. A high
SSC2016S C3 RVS2
frequency switching current flows to RCS, and may cause
poor operation if a high inductance resistor is used.
Choose a low inductance and high surge-tolerant type.
Figure 9-3. The IC Peripheral Circuit.

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RCS is calculated using the following Equation (11), 1) Limiting of ZCD pin source current (at Q1 ON
where Overcurrent Protection Threshold Voltage state)
VCS(OCP) is 0.500 V and ILP is calculated using Equation
(5). N
√2 × VACRMS(MAX) × N D
P
(Ω) (15)
R1 >
�VCS(OCP) � 3 × 10−3 (A)
R CS ≤ (Ω) (11)
ILP
Where
The loss PRCS at RCS is calculated by Equation (13) VACRMS(MAX): Maximum AC input voltage rms value
using Equation (12). (V)
NP: The number of turns of boost winding P (turns)
ND: The number of turns of auxiliary winding D (turns)
2√2 × POUT
IDRMS =
η × VACRMS(MIN) 2) Limiting of ZCD pin sink current (at Q1 OFF
state)
1 4√2 × VACRMS(MIN) (12)
ND
×� − (A) VOUT ×
6 9 × π × VOUT NP (16)
R1 > (Ω)
3 × 10−3 (A)
PRCS = IDRMS 2 × R CS (W) (13) Where
VOUT: Output voltage (V)
Where NP: The number of turns of boost winding P (turns)
IDRMS: RMS Drain current (A) ND: The number of turns of auxiliary winding D (turns)
VACRMS(MIN): Minimum AC input voltage rms value (V)
VOUT: Output voltage (V)
POUT: Output power (W)
η: Efficiency of PFC 9.2.6 OUT Pin Peripheral Circuit (Gate
Drive Circuit)
The CR filter (R5 and C5) is connected to CS pin. The OUT pin is the gate drive output that can drive
CR filter (R5 and C5) prevents IC from responding to the external power MOSFET directly.
the drain current surge at MOSFET turn-on and avoids The maximum output voltage of OUT pin is the VCC
the unstable operation of the IC. pin voltage. The maximum current is −500 mA for
R5 value of approximately 47 Ω is recommended, source and 1000 mA for sink, respectively.
since the CS Pin Source Current affects the accuracy of R3 is for source current limiting. Both R2 and D1 are
OCP detection. for sink current limiting. The values of these
C5 value is reccommended to be calculated by using components are adjusted to decrease the ringing of Gate
following formula in which cut-off frequency of CR pin voltage and the EMI noise. The reference value is
filter (C5 and R5) is approximately 0.5 MHz to 3.0MHz. several ohms to several dozen ohms.
R4 is used to prevent malfunctions due to steep dv/dt
1 at turn-off of the power MOSFET, and the resistor is
C5 = (F) (14)
2π × 1 × 106 × R5 connected near the MOSFET, between the gate and
source. The reference value of R4 is from 10 kΩ to 100
If R5 value is 47 Ω, C5 value is approximately kΩ. R2, R3, D1 and R4 are affected by the printed
1000 pF to 6800 pF. C5 value should adjust based on circuit board trace layout and the power MOSFET
actual operation in application. capacitance. Thus, the optimal values should be adjusted
under actual operation of the application.

9.2.5 ZCD Pin Peripheral Circuit, R1 and


C6
R1 is for the limiting of the input and output current
to ZCD pin. The value of resistor R1 is determined so
that the ZCD pin current is smaller than the absolute
maximum rating. The recommended value of ZCD pin
current is less than 3 mA.
The R1 value is chosen to satisfy both Equation (15)
and Equation (16). In addition, the bottom-on timing is
set by C6 and R1 (See Section 8.5).

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9.2.7 VCC Pin Peripheral Circuit ● RZ, CCP and DZVCC


The circuit consists of RZ, CCP and RZ is the boost
< Using External Power Supply > circuit of VCC pin.
Figure 9-4 shows the VCC pin peripheral circuit. The RZ is the limiting resistor for the breakdown current of
value of capacitor C7 is set approximately 1000 pF, in DZVCC. The RZ value is approximately 150 Ω.
order to reduce the switching noise. CCP is charged when Q1 is in ON state. The CCP value
is approximately 22 nF.
8 U1 Since the absolute maximum rating value of VCC pin
External VCC
power supply is 28 V, the zener voltage of DZVCC is chosen to be
3 less than it.
COMP
C7
RS
CP ● C7
GND
If CVCC and the VCC pin are distant from each other,
CS 6 a capacitor C7 should be placed as close as possible to
the VCC pin. C7 is approximately 1000 pF, in order
to reduce the switching noise.
Figure 9-4. VCC Pin Peripheral Circuit
(Power supply from external power supply)
VAC VOUT
T1

P DFW
< Using Auxiliary Winding D for VCC supply > Q1
C1 RST
Figure 9-5 shows the VCC pin peripheral circuit when D VD
VCC pin is supplied from auxiliary winding. VB RCS

● RST RZ
LINE
GND
The value of startup resistor, RST is selected so that
the current more than ICC(OFF) = 100 µA (max.) can be CCP VCCP
8
supplied to VCC pin at startup.RST is expressed as VCC DVCC
follows: U1 DZVCC
C7 CVCC
GND
6
√2 × VACRMS(MIN) − VCC(ON) max.
R ST < (Ω) (17)
ICC(OFF) max.
Figure 9-5. VCC Pin Peripheral Circuit
(Power supply from auxiliary winding)
Where, VACRMS(MIN) is Minimum AC input voltage
rms value (V)

When the specification of AC input voltage is 100 V 9.2.8 Power MOSFET, Q1


or Universal, the value of RST is approximately Choose a power MOSFET having proper margin of
100 kΩ to 220 kΩ. When the specification of AC VDSS against output voltage, VOUT. The size of heat sink
input voltage is 230 V, the value of RST is is chosen taking into account some loss by switching
approximately 180 kΩ to 330 kΩ. and ON resistance of MOSFET.
The rating of RST is chosen taking into account the The loss PRDS(ON) by on-resistance, RDS(ON) of power
loss of RST at maximum input voltage. Since the high MOSFET is calculated using IDRMS of the result of
voltage is applied to resistor, choose a resistor Equation (12) as follows:
designed against electromigration or use a series
combination of resistors. PRDS(ON) = IDRMS 2 × R DS(ON)125°C (W) (19)

● CVCC Where
The approximate startup time is determined by the RDS(ON)125°C: ON resistance of MOSFET at
value of CVCC. It is calculated as follows where the Tch = 125 °C (Ω)
initial voltage of VCC pin is zero.

C7 × VCC(ON)
t START ≈ (s)
√2 × VACRMS − VCC(ON) (18)
− ICC(OFF)
R ST

In general, power supply applications, CVCC, is


approximately 22 µF to 47 µF.

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9.2.9 Boost Diode, DFW 2) Output hold time considered


Choose a boost diode having proper margin of a peak 2 × POUT × t HOLD
reverse voltage VRSM against output voltage VOUT. C2 > (F) (23)
A fast recovery diode is recommended to reduce the VOUT 2 − VOUT(MIN) 2
switching noise and loss. Please ask our staff about our
lineup. The size of heat sink is chosen taking into Where
account some loss by VF and recovery current of boost tHOLD: Output hold time (s)
diode. VOUT(MIN) : Minmum output voltage of C2 during
The loss of VF, PDFW is expressed as follows: output hold (V)

PDFW = VF × IOUT (W) (20) If tHOLD = 20 ms, PO = 200 W, η = 90 % and the


output voltage = 330 V to 390 V, C2 value is derived
Where as 205 μF. Thus, C2 value of approximately 220 μF is
VF: Forward voltage of boost diode (V) connected.
IOUT: Out put current (A)

9.3 PCB Trace Layout and Component


9.2.10 Bypass Diode, DBYP Placement
Bypass diode protects the boost diode from a large Since the PCB traces design and the component
current such as an inrush current. A high surge current layout significantly affects operation, EMI noise, and
tolerance diode is recommended. Please ask our staff power dissipation, the high frequency PCB trace should
about our lineup. be low impedance with small loop and wide trace.
In addition, the ground traces affect radiated EMI
noise, and wide, short traces should be taken into
account.
9.2.11 Output Capacitor, C2
Figure 9-6 shows the circuit design example.
Apply proper design margin to accommodate the
ripple current, the ripple voltage and the temperature rise. 1) Main Circuit Trace
Use of high ripple current and low impedance types, This is the main trace containing switching currents,
designed for switch-mode power supplies, is and thus it should be as wide trace and small loop as
recommended, depending on their purposes. possible.
In order to obtain C2 value CO, calculate both
Equation (21) and (23) described in following and select 2) Control Ground Trace Layout
a larger value. Since the operation of IC may be affected from the
large current of the main trace that flows in control
1) Ripple voltage considered ground trace, the control ground trace should be
separated from main trace and connected at a single
IOUT point grounding of point A in Figure 9-6 as close to
C2 = (F) (21)
2π × fLINE × VOUT(RI) the RCS pin as possible.

Where 3) RCS Trace Layout


VOUTRIPPLE: C2 ripple voltage (10 VPP for example) RCS should be placed as close as possible to the
fLINE: Line frequency (Hz) Source pin and the CS pin. The peripheral
IOUT: Output current (A) components of CS pin should be connected by
dedicated pattern from root of RCS.
The C2 voltage is expressed Equation (22). The connection between the power ground of the
When the output ripple is high, the VC2 voltage may main trace and the IC ground should be at a single
reach to Overvoltage Protection voltage, VOVP in near point ground which is close to the base of RCS.
the maximum value of VC2, or input current waveform
may be distorted due to the stop of the boost operation 4) Peripheral Component of IC
in near the minmum value of VC2. It is necessary to The components for control connected to the IC
select large CO value or change the setting of output should be placed as close as possible to the IC, and
voltage (boost voltage). should be connected as short as possible to the each
pin.
VOUT(RI)
VC2 = VOUT ± (V) (22)
2

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(1) Main trace should be wide


trace and small loop
DBYP
BR1
P DFW VOUT
VAC
T1 D1 R2
D
Q1
C1 R3
R4 C2

(3)RCS Should be as RCS


close to Source
LINE
pin as possible. A GND

(2) Control GND trace (3) Connected by dedicated


should be connected at a pattern from root of RCS
single point as close to
the RCS as possible R1 U1 R5
C5
ZCD CS
5 4 RS CS
C6
NC

GND COMP
6 3 CP

OUT CT
C7 7 2 C4
RVS1
External power VCC FB
supply 8 1
C3 RVS2
SSC2016S

(4)The components connected to the IC should be as close to the IC


as possible, and should be connected as short as possible

Figure 9-6. Example of Connection of Peripheral Component

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SSC2016S

10. Reference Design of Power Supply


As an example, the following show the power supply specification, the circuit schematic, the bill of materials, and
the transformer specification.

● Power Supply Specifications


IC SSC2016S
Input Voltage 85V AC to 265VAC
Output Power 100 W (390V, 0.256 A)
Minimum Frequency 45 kHz

● Circuit Schematic
F1 L1
DB1 D1 D2
VAC C1 C2 VOUT
P

C3 T1

D
R11

R8 R12
SSC2016S
1 8 External Power C4 R13
FB VCC
supply
U1
2 7 C11 R14
CT OUT
R3 D3
3 6 Q1
NC

COMP GND R15


R5
4 5
C5 C6 CS ZCD R4 R16
R9 R1
C8

R10 R2 C10
C7 C9
R6 R7

LINE
GND

● Bill of Materials
Recommended Recommended
Symbol Ratings(1) Symbol Ratings(1)
Sanken Parts Sanken Parts
F1 Fuse, AC250 V, 4 A R1 68 kΩ
L1 (2)
CM inductor, 12 mH R2 47 Ω
DB1 Bridge diode, 600 V, 4 A R3 (2)
10 Ω
D1 600 V, 3 A RM 4A R4 (2)
100 Ω
(2)
D2 Fast recovery, 600 V, 5 A FMX-G16S R5 10 kΩ
D3 Schottky, 40 V, 1 A AK 04 R6 0.24 Ω, 1 W
C1 (2)
Film, 0.22 μF, 310 V R7 0.24 Ω, 1 W
C2 (2)
Film, 0.22 μF, 310 V R8 47 kΩ
C3 Ceramic, 0.82 μF, 450V R9 22 kΩ, ± 1 %
C4 Electrolytic, 120 μF, 450 V R10 (2) 2 kΩ, ± 1 %
C5 Ceramic, 0.01 μF R11 (3) 750 kΩ, ± 1 %
C6 Ceramic, 1000 pF R12 (3) 750 kΩ, ± 1 %
C7 Ceramic, 0.47 μF R13 (3) 750 kΩ, ± 1 %
C8 Ceramic, 1 μF R14 (3) 750 kΩ, ± 1 %
C9 Ceramic, 3300 pF R15 (2)(3) 750 kΩ, ± 1 %
C10 (2) Ceramic, Open R16 (2)(3) 30 kΩ, ± 1 %
(2)
C11 Ceramic, Open T1 See the specification
Q1 Power MOSFET, 600 V,10A, < 0.75 Ω U1 IC SSC2016S
(1)
Unless otherwise specified, the voltage rating of capacitor is 50 V or less and the power rating of resistor is 1/8 W or less.
(2)
It is necessary to be adjusted based on actual operation in the application.
(3)
Resistors applied high DC voltage and of high resistance are recommended to select resistors designed against electromigration or use
combinations of resistors in series for that to reduce each applied voltage, according to the requirement of the application.

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SSC2016S

● Transformer Specification
Primary Inductance : 290 μH
Core Size : EER28
AL-Value : 92.5 nH/N2
Gap Length : 1.2 mm (center gap)
Winding Specification
Number of
Location Symbol Wire (mm) Configuration Note
Turns (turns)
Primary Winding P1 56 φ 0.20 × 10 Solenoid winding Litz wire
Auxiliary Winding D 8 φ 0.32 Solenoid winding

D AC input VCC, ZCD

P1 D
P1
Drain GND
Bobbin

Cross-section view ●mark shows the start point of winding

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SSC2016S

Important Notes
● All data, illustrations, graphs, tables and any other information included in this document as to Sanken’s products listed herein (the
“Sanken Products”) are current as of the date this document is issued. All contents in this document are subject to any change
without notice due to improvement of the Sanken Products, etc. Please make sure to confirm with a Sanken sales representative
that the contents set forth in this document reflect the latest revisions before use.
● The Sanken Products are intended for use as components of general purpose electronic equipment or apparatus (such as home
appliances, office equipment, telecommunication equipment, measuring equipment, etc.). Prior to use of the Sanken Products,
please put your signature, or affix your name and seal, on the specification documents of the Sanken Products and return them to
Sanken. When considering use of the Sanken Products for any applications that require higher reliability (such as transportation
equipment and its control systems, traffic signal control systems or equipment, disaster/crime alarm systems, various safety
devices, etc.), you must contact a Sanken sales representative to discuss the suitability of such use and put your signature, or affix
your name and seal, on the specification documents of the Sanken Products and return them to Sanken, prior to the use of the
Sanken Products. The Sanken Products are not intended for use in any applications that require extremely high reliability such as:
aerospace equipment; nuclear power control systems; and medical equipment or systems, whose failure or malfunction may result
in death or serious injury to people, i.e., medical devices in Class III or a higher class as defined by relevant laws of Japan
(collectively, the “Specific Applications”). Sanken assumes no liability or responsibility whatsoever for any and all damages and
losses that may be suffered by you, users or any third party, resulting from the use of the Sanken Products in the Specific
Applications or in manner not in compliance with the instructions set forth herein.
● In the event of using the Sanken Products by either (i) combining other products or materials therewith or (ii) physically,
chemically or otherwise processing or treating the same, you must duly consider all possible risks that may result from all such
uses in advance and proceed therewith at your own responsibility.
● Although Sanken is making efforts to enhance the quality and reliability of its products, it is impossible to completely avoid the
occurrence of any failure or defect in semiconductor products at a certain rate. You must take, at your own responsibility,
preventative measures including using a sufficient safety design and confirming safety of any equipment or systems in/for which
the Sanken Products are used, upon due consideration of a failure occurrence rate or derating, etc., in order not to cause any human
injury or death, fire accident or social harm which may result from any failure or malfunction of the Sanken Products. Please refer
to the relevant specification documents and Sanken’s official website in relation to derating.
● No anti-radioactive ray design has been adopted for the Sanken Products.
● No contents in this document can be transcribed or copied without Sanken’s prior written consent.
● The circuit constant, operation examples, circuit examples, pattern layout examples, design examples, recommended examples, all
information and evaluation results based thereon, etc., described in this document are presented for the sole purpose of reference of
use of the Sanken Products and Sanken assumes no responsibility whatsoever for any and all damages and losses that may be
suffered by you, users or any third party, or any possible infringement of any and all property rights including intellectual property
rights and any other rights of you, users or any third party, resulting from the foregoing.
● All technical information described in this document (the “Technical Information”) is presented for the sole purpose of reference
of use of the Sanken Products and no license, express, implied or otherwise, is granted hereby under any intellectual property
rights or any other rights of Sanken.
● Unless otherwise agreed in writing between Sanken and you, Sanken makes no warranty of any kind, whether express or implied,
including, without limitation, any warranty (i) as to the quality or performance of the Sanken Products (such as implied warranty
of merchantability, or implied warranty of fitness for a particular purpose or special environment), (ii) that any Sanken Product is
delivered free of claims of third parties by way of infringement or the like, (iii) that may arise from course of performance, course
of dealing or usage of trade, and (iv) as to any information contained in this document (including its accuracy, usefulness, or
reliability).
● In the event of using the Sanken Products, you must use the same after carefully examining all applicable environmental laws and
regulations that regulate the inclusion or use of any particular controlled substances, including, but not limited to, the EU RoHS
Directive, so as to be in strict compliance with such applicable laws and regulations.
● You must not use the Sanken Products or the Technical Information for the purpose of any military applications or use, including
but not limited to the development of weapons of mass destruction. In the event of exporting the Sanken Products or the Technical
Information, or providing them for non-residents, you must comply with all applicable export control laws and regulations in each
country including the U.S. Export Administration Regulations (EAR) and the Foreign Exchange and Foreign Trade Act of Japan,
and follow the procedures required by such applicable laws and regulations.
● Sanken assumes no responsibility for any troubles, which may occur during the transportation of the Sanken Products including
the falling thereof, out of Sanken’s distribution network.
● Although Sanken has prepared this document with its due care to pursue the accuracy thereof, Sanken does not warrant that it is
error free and Sanken assumes no liability whatsoever for any and all damages and losses which may be suffered by you resulting
from any possible errors or omissions in connection with the contents included herein.
● Please refer to the relevant specification documents in relation to particular precautions when using the Sanken Products, and refer
to our official website in relation to general instructions and directions for using the Sanken Products.

DSGN-CEZ-16001

SSC2016S - DSJ Rev.1.3 SANKEN ELECTRIC CO.,LTD. 22


Jul. 22, 2016 http://www.sanken-ele.co.jp/en/
© SANKEN ELECTRIC CO.,LTD. 2015

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