AP63300/1-EVM

3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH

ENCHANCED EMI REDUCTION

DESCRIPTION

The AP63300/AP63301 is 3A, synchronous buck The AP63300/AP63301 design is optimized for
converter with a wide input voltage range of 3.8V Electromagnetic Interference (EMI) reduction. The
to 32V. The device fully integrates a 75mΩ high- device has a proprietary gate driver scheme to
side power MOSFET and a 40mΩ low-side power resist switching node ringing without sacrificing
MOSFET to provide high-efficiency step-down DC- MOSFET turn-on and turn-off times, which reduces
DC conversion. high-frequency radiated EMI noise caused by
MOSFET switching. AP63300 also features
The AP63300/AP63301 device is easily used by Frequency Spread Spectrum (FSS) with a switching
minimizing the external component count due to its frequency jitter of ±6%, which reduces EMI by not
adoption of peak current mode control along with allowing emitted energy to stay in any one
its integrated loop compensation network. frequency for a significant period of time.
The device is available in a TSOT26 package.

FEATURES
 VIN 3.8V to 32V  Frequency Spread Spectrum (FSS) to Reduce
 3A Continuous Output Current EMI
 0.8V ± 1% Reference Voltage o AP63300
 22µA Ultralow Quiescent Current (Pulse  Low-Dropout (LDO) Mode
Frequency Modulation)  Precision Enable Threshold to Adjust UVLO
 500kHz Switching Frequency  Protection Circuitry
 Supports Pulse Frequency Modulation (PFM) o Undervoltage Lockout (UVLO)
o AP63300 o Output Overvoltage Protection (OVP)
o Up to 88% Efficiency at 5mA Light Load o Cycle-by-Cycle Peak Current Limit
 Pulse Width Modulation (PWM) Regardless of o Thermal Shutdown
Output Load
o AP63301
 Proprietary Gate Driver Design for Best EMI
Reduction

AP63300/AP63301 1 of 11 September 2019

Document number: DS42002 Rev. 3 - 2 www.diodes.com © Diodes Incorporated
 AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION

APPLICATIONS

 5V, 12V, and 24V Distributed Power Bus Supplies

 FPGA, DSP, and ASIC Supplies
 Flat Screen TV Sets and Monitors
 White Goods and Small Home Appliances
 Home Audio
 Network Systems
 Consumer Electronics
 Cordless Power Tools
 Optical Communication and Networking Systems
 General Purpose Point of Load

FUNCTIONAL BLOCK

I1 I2
1.5μA 4μA
VCC VCC
3 VIN
Regulator

20kΩ
EN 2 + ON Internal 0.8V
1.18V Reference
–
RT = 0.2V/A +
CSA
-
FB 1 + OVP
0.88V - 6 BST

+ OCP
Ref -
- OVP
0.8V +
Internal
+
SS Error
Amplifier
COMP
- Control
VSUM 5 SW
+ Logic
PWM
+ Comparator

Thermal TSD
SE = 0.84V/T Shutdown
500kHz
Oscillator CLK
4 GND

Figure 1. Functional Block Diagram

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Document number: DS42002 Rev. 3 - 2 www.diodes.com © Diodes Incorporated
 AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Rating Unit

-0.3 to +35.0 (DC)
VIN Supply Pin Voltage V
-0.3 to +40.0 (400ms)
VFB Feedback Voltage -0.3V to +6.0 V
VEN Enable/UVLO Pin Voltage -0.3 to +35.0 V
-0.3 to VIN + 0.3 (DC) V
VSW Switch Node Voltage
-2.5 to VIN + 2.0 (20ns) V
VBST Bootstrap Pin Voltage VSW - 0.3 to VSW + 6.0 V
TST Storage Temperature -65 to +150 °C
TJ Junction Temperature +160 °C
TL Lead Temperature +260 °C
ESD Susceptibility (Note 5)
HBM Human Body Mode 2000 V
CDM Charged Device Model 1000 V

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Min Max Unit

VIN Supply Voltage 3.8 32 V
VOUT Output Voltage 0.8 31 V
TA Operating Ambient Temperature
+85 °C
Range -40
TJ Operating Junction Temperature
+125 °C
Range -40

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Document number: DS42002 Rev. 3 - 2 www.diodes.com © Diodes Incorporated
 AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION

EVALUATION BOARD

Figure 2. Top Picture of EV Board

QUICK START GUIDE

The AP63300-EVM has a simple layout and allows access to the appropriate signals through test points.
To evaluate the performance of the AP63300, follow the procedure below:

1. For evaluation board configured at VOUT=5V, connect a power supply to the input terminals VIN and
GND. Set VIN to 12V.

2. Connect the positive terminal of the electronic load to VOUT and negative terminal to GND.

3. For Enable, place a jumper to “H” position to enable IC. Jump to “L” position to disable IC.

4. The evaluation board should now power up with a 5V output voltage.

5. Check for the proper output voltage of 5V (±1%) at the output terminals VOUT and GND. Measurement
can also be done with a multimeter with the positive and negative leads between VOUT and GND.

6. Set the load to 3A through the electronic load. Check for the stable operation of the SW signal on the
oscilloscope. Measure the switching frequency.

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 AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION

MEASUREMENT/PERFORMANCE GUIDELINES:

1) When measuring the output voltage ripple, maintain the shortest possible ground lengths on the
oscilloscope probe. Long ground leads can erroneously inject high frequency noise into the
measured ripple.

2) For efficiency measurements, connect an ammeter in series with the input supply to measure the
input current. Connect an electronic load to the output for output current.

Setting the Output Voltage of AP63300

1) Setting the output voltage
The AP63300 features external programmable output voltage by using a resistor divider network
R3 and R1 as shown in the typical application circuit. The output voltage is calculated as below,
 R  R3 
VOUT  0.8   1 
 R1 
First, select a value for R1 according to the value recommended in the table 1. Then, R3 is
determined. The output voltage is given by Table 1 for reference. For accurate output voltage, 1%
tolerance is required.
2) Output feed-forward capacitor selection
The AP63300 has the internal integrated loop compensation as shown in the function block
diagram. The compensation network includes a 18k resistor and a 7.6nF capacitor. Usually, the
type II compensation network has a phase margin between 60 and 90 degree. However, if the
output capacitor has ultra-low ESR, the converter results in low phase margin. To increase the
converter phase margin, a feed-forward cap C4 is used to boost the phase margin at the converter
f
cross-over frequency C . The feed-forward capacitor is given by Table 1 for reference. The feed-
forward capacitor is calculated as below,
1
C ff 
2  f  R3
C

Table 1. Resistor selection for output voltage setting

Vo R3 R1 C4 C6-C8
1.8V 77.5 KΩ 62 KΩ 100pF 22uFx2
2.5V 131 KΩ 62 KΩ 100pF 22uFx2
3.3V 182 KΩ 62 KΩ 100 pF 22uFx2
5V 157 KΩ 30 KΩ 100 pF 22uFx2
12V 249 KΩ 18 KΩ 56 pF 22uFx4

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 AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION

EXTERNAL COMPONENT SELECTION:

1) Input & output Capacitors (Cin, Cout)
(1) For lower output ripple, low ESR is required.
(2) Low leakage current needed, X5R/X7R ceramic recommend, multiple capacitor parallel
connection.
(3) The Cin and Cout capacitances are greater than 22uF and 44uF respective.
2) Bootstrap Voltage Regulator
(1) An external 0.1uF ceramic capacitor is required as bootstrap capacitor between BST and SW
pin to work as high side power MOSFET gate driver.
3) Inductor (L)
(1) Low DCR for good efficiency
(2) Inductance saturate current must higher than the output current
(3) The recommended inductance is shown in the table 2 below.

EVALUATION BOARD SCHEMATIC

30K

FB BS
157K 100pF
AP63300

0.1uF
Floating
VOUT= 5.0 V
OFF EN LX
6.8mH
COUT
VIN = 12 V 22mF*2
VIN GND
CIN
10mF 1mF

Figure 3. Typical Application Circuit

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Document number: DS42002 Rev. 3 - 2 www.diodes.com © Diodes Incorporated
 AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION

PCB TOP LAYOUT

Figure 4. AP63300/1-EVM – Top Layer

PCB BOTTOM LAYOUT

Figure 5. AP63300/1 -EVM – Bottom Layer

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Document number: DS42002 Rev. 3 - 2 www.diodes.com © Diodes Incorporated
 AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION

BILL OF MATERIALS for AP63300/1-EVM

Item Value Type Rating Description Description

X5R/X7R,
C2 22uF 35V Input CAP
Ceramic/1206
X5R/X7R, Würth PART
C3 0.1uF 50V Input CAP
Ceramic/0603 885 012 206 095
Würth PART
C4 100pF 0603 100V Feedback CAP
885 012 206 102
X5R/X7R, Würth PART
C5 0.1uF 50V Bootstrap CAP
Ceramic/0603 885 012 206 095
X5R/X7R,
C6 & C7 22uF 25V Output CAP
Ceramic/1206
Würth PART
L1 6.8uH 6060 6.5A Inductor
744 393 690 68
R1 30K 0603 1%
Voltage set RES*
R3 162K 0603 1%
R4 & R7 0 0603 1% Bootstrap RES
U1 AP63300 TSOT23-6 Diodes BCD
*Note: The present value of R3/R1 are based on Vout=5.0V

AP63300/AP63301 8 of 11 September 2019

Document number: DS42002 Rev. 3 - 2 www.diodes.com © Diodes Incorporated
 AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION

TYPICAL PERFORMANCE CHARACTERISTICS

VIN = 12V, VOUT = 5V, L = 6.8μH VIN = 12V, VOUT = 3.3V, L = 4.7μH
VIN = 24V, VOUT = 5V, L = 6.8μH VIN = 24V, VOUT = 3.3V, L = 4.7μH
100

90

80

70
Efficiency (%)

60

50

40

30

20

10

0
0.001 0.010 0.100 1.000 10.000
IOUT (A)

Figure 5. AP63300 Efficiency vs. Output Current

VIN = 12V, VOUT = 5V, L = 6.8μH VIN = 12V, VOUT = 3.3V, L = 4.7μH

VIN = 24V, VOUT = 5V, L = 6.8μH VIN = 24V, VOUT = 3.3V, L = 4.7μH
100

90

80

70
Efficiency (%)

60

50

40

30

20

10

0
0.001 0.010 0.100 1.000 10.000
IOUT (A)

Figure 6. AP63301 Efficiency vs. Output Current

AP63300/AP63301 9 of 11 September 2019

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 AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION

Figure 7. AP63301 Vin=12 Vout=5V Output Voltage Ripple, IOUT = 50mA

Figure 8. AP63301 Vin=12 Vout=5V Output Voltage Ripple, IOUT = 3A

AP63300/AP63301 10 of 11 September 2019

Document number: DS42002 Rev. 3 - 2 www.diodes.com © Diodes Incorporated
 AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION

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AP63300/AP63301 11 of 11 September 2019

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